We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent 86cda19 commit 32a7ffdCopy full SHA for 32a7ffd
src/desc.rs
@@ -3,9 +3,15 @@ use core::ops::{Deref, DerefMut};
3
use aligned::{Aligned, A8};
4
use volatile_register::{RO, RW};
5
6
+#[cfg(not(feature = "stm32f107"))]
7
+const DESC_SIZE: usize = 8;
8
+
9
+#[cfg(feature = "stm32f107")]
10
+const DESC_SIZE: usize = 4;
11
12
#[repr(C)]
13
pub struct Descriptor {
- desc: Aligned<A8, [u32; 8]>,
14
+ desc: Aligned<A8, [u32; DESC_SIZE]>,
15
}
16
17
impl Clone for Descriptor {
@@ -25,7 +31,7 @@ impl Default for Descriptor {
25
31
impl Descriptor {
26
32
pub const fn new() -> Self {
27
33
Self {
28
- desc: Aligned([0; 8]),
34
+ desc: Aligned([0; DESC_SIZE]),
29
35
30
36
37
0 commit comments