By Bachotti Sai Krishna Shanmukh EE19B009 and P N Neelesh Sumedh EE19B047
The 1D_Baseline folder contains the baseline C/C++ code for transpose form based fir filter
The gpu folder contains the CUDA code for FIR filter
The hls folder contains the Optimization codes in Vivado HLS Project folders
The block_rtl folder contains the custom verilog code that implements MCM technique and has Xilinx timing and utilization synthesis reports.