feat: 恢复从设备树解析外设地址

- 使用解析的外设地址初始化 SBI 依赖的外设
- 细致配置 pmp 保护区段

Author: YdrMaster

rustsbi-qemu/src/device_tree.rs

@@ -1,6 +1,7 @@
 use alloc::{string::String, vec, vec::Vec};
 use core::ops::Range;
 
+#[derive(Debug)]
 pub(crate) struct BoardInfo {
     pub dtb: Range<usize>,
     pub model: String,
@@ -12,45 +13,72 @@ pub(crate) struct BoardInfo {
 }
 
 pub(crate) fn parse(opaque: usize) -> BoardInfo {
-    use dtb_walker::{Dtb, DtbObj, Property, WalkOperation};
+    use dtb_walker::{Dtb, DtbObj, Property, WalkOperation::*};
+    const CPUS: &[u8] = b"cpus";
+    const MEMORY: &[u8] = b"memory";
+    const SOC: &[u8] = b"soc";
+    const UART: &[u8] = b"uart";
+    const TEST: &[u8] = b"test";
+    const CLINT: &[u8] = b"clint";
 
     let mut ans = BoardInfo {
         dtb: opaque..opaque,
         model: String::new(),
         smp: 0,
         mem: vec![],
-        uart: 0x1000_0000..0x1000_0100,
-        test: 0x10_0000..0x10_1000,
-        clint: 0x200_0000..0x201_0000,
+        uart: 0..0,
+        test: 0..0,
+        clint: 0..0,
     };
     let dtb = unsafe { Dtb::from_raw_parts(opaque as _) }.unwrap();
     ans.dtb.end += dtb.total_size();
     dtb.walk(|path, obj| match obj {
         DtbObj::SubNode { name } => {
-            if path.last().is_empty() && name == b"cpus" {
-                WalkOperation::StepInto
-            } else if path.last() == b"cpus" && name.starts_with(b"cpu@") {
-                ans.smp += 1;
-                WalkOperation::StepOver
-            } else if path.last().is_empty() && name.starts_with(b"memory") {
-                WalkOperation::StepInto
+            let current = path.last();
+            if current.is_empty() {
+                if name == CPUS || name == SOC || name.starts_with(MEMORY) {
+                    StepInto
+                } else {
+                    StepOver
+                }
+            } else if current == SOC {
+                if name.starts_with(UART) || name.starts_with(TEST) || name.starts_with(CLINT) {
+                    StepInto
+                } else {
+                    StepOver
+                }
             } else {
-                WalkOperation::StepOver
+                if current == CPUS && name.starts_with(b"cpu@") {
+                    ans.smp += 1;
+                }
+                StepOver
             }
         }
         DtbObj::Property(Property::Model(model)) if path.last().is_empty() => {
             if let Ok(model) = model.as_str() {
                 ans.model = model.into();
             }
-            WalkOperation::StepOver
+            StepOver
         }
-        DtbObj::Property(Property::Reg(reg)) if path.last().starts_with(b"memory") => {
-            for region in reg {
-                ans.mem.push(region);
+        DtbObj::Property(Property::Reg(mut reg)) => {
+            let node = path.last();
+            if node.starts_with(UART) {
+                ans.uart = reg.next().unwrap();
+                StepOut
+            } else if node.starts_with(TEST) {
+                ans.test = reg.next().unwrap();
+                StepOut
+            } else if node.starts_with(CLINT) {
+                ans.clint = reg.next().unwrap();
+                StepOut
+            } else if node.starts_with(MEMORY) {
+                ans.mem = reg.into_iter().collect();
+                StepOut
+            } else {
+                StepOver
             }
-            WalkOperation::StepOut
         }
-        DtbObj::Property(_) => WalkOperation::StepOver,
+        DtbObj::Property(_) => StepOver,
     });
 
     ans

rustsbi-qemu/src/hart_csr_utils.rs

@@ -4,11 +4,10 @@ use riscv::register::{
     misa::{self, MXL},
 };
 
-pub fn print_hart_csrs() {
+pub(crate) fn print_hart_csrs() {
     print_misa();
     print_mideleg();
     print_medeleg();
-    print_pmps();
 }
 
 #[inline]
@@ -112,7 +111,7 @@ fn print_medeleg() {
     );
 }
 
-fn print_pmps() {
+pub(crate) fn print_pmps() {
     const ITEM_PER_CFG: usize = core::mem::size_of::<usize>();
     const CFG_STEP: usize = ITEM_PER_CFG / core::mem::size_of::<u32>();
 

rustsbi-qemu/src/main.rs

@@ -12,6 +12,7 @@ extern crate alloc;
 mod clint;
 mod device_tree;
 mod execute;
+mod hart_csr_utils;
 mod ns16550a;
 mod qemu_hsm;
 mod test_device;
@@ -106,6 +107,7 @@ extern "C" fn early_trap() -> ! {
 }
 
 use core::sync::atomic::{AtomicBool, Ordering::AcqRel};
+use device_tree::BoardInfo;
 use spin::Once;
 
 #[link_section = ".bss.uninit"]
@@ -117,6 +119,8 @@ extern "C" fn rust_main(_hartid: usize, opaque: usize) {
 
     #[link_section = ".bss.uninit"]
     static GENESIS: AtomicBool = AtomicBool::new(false);
+    static CSR_PRINT: AtomicBool = AtomicBool::new(false);
+    static BOARD_INFO: Once<BoardInfo> = Once::new();
 
     // 全局初始化过程
     if !GENESIS.swap(true, AcqRel) {
@@ -125,7 +129,7 @@ extern "C" fn rust_main(_hartid: usize, opaque: usize) {
         // 初始化堆和分配器
         init_heap();
         // 解析设备树，需要堆来保存结果里的字符串等
-        let board_info = device_tree::parse(opaque);
+        let board_info = BOARD_INFO.call_once(|| device_tree::parse(opaque));
         // 初始化外设
         clint::init(board_info.clint.start);
         test_device::init(board_info.test.start);
@@ -165,7 +169,10 @@ extern "C" fn rust_main(_hartid: usize, opaque: usize) {
 
     let hsm = HSM.wait();
     if let Some(supervisor) = hsm.take_supervisor() {
-        set_pmp();
+        set_pmp(BOARD_INFO.wait());
+        if !CSR_PRINT.swap(true, AcqRel) {
+            hart_csr_utils::print_pmps();
+        }
         execute::execute_supervisor(hsm, supervisor);
     }
 }
@@ -209,14 +216,31 @@ fn init_heap() {
 }
 
 /// 设置 PMP。
-fn set_pmp() {
-    use riscv::register::{pmpaddr0, pmpaddr1, pmpcfg0, Permission, Range};
+fn set_pmp(board_info: &BoardInfo) {
+    use riscv::register::{
+        pmpaddr0, pmpaddr1, pmpaddr2, pmpaddr3, pmpaddr4, pmpaddr5, pmpcfg0, Permission, Range,
+    };
+    let mem = &board_info.mem[0];
+    let dtb = &board_info.dtb;
     unsafe {
-        pmpcfg0::set_pmp(0, Range::NAPOT, Permission::RWX, false);
-        pmpcfg0::set_pmp(1, Range::NAPOT, Permission::NONE, false);
+        pmpcfg0::set_pmp(0, Range::OFF, Permission::NONE, true);
+        pmpaddr0::write(0);
+        // 外设
+        pmpcfg0::set_pmp(1, Range::TOR, Permission::RW, false);
+        pmpaddr1::write(mem.start >> 2);
+        // SBI
+        pmpcfg0::set_pmp(2, Range::TOR, Permission::NONE, false);
+        pmpaddr2::write(SUPERVISOR_ENTRY >> 2);
+        // 主存
+        pmpcfg0::set_pmp(3, Range::TOR, Permission::RWX, true);
+        pmpaddr3::write(dtb.start >> 2);
+        // 设备树
+        pmpcfg0::set_pmp(4, Range::TOR, Permission::R, false);
+        pmpaddr4::write(dtb.end >> 2);
+        //主存
+        pmpcfg0::set_pmp(5, Range::TOR, Permission::RWX, true);
+        pmpaddr5::write(mem.end >> 2);
     }
-    pmpaddr0::write(usize::MAX);
-    pmpaddr1::write((entry as usize >> 2) | 0x10_0000 >> 2);
 }
 
 #[inline(always)]