fix: 以深度优先遍历方案恢复设备树解析

Author: YdrMaster

Cargo.lock

@@ -15,3 +15,4 @@ r0 = "1"
 nb = "1"
 buddy_system_allocator = "0.8"
 uart_16550 = "0.2"
+dtb-walker = { git = "https://github.com/YdrMaster/dtb-walker.git", rev = "0ef2209" }

rustsbi-qemu/Cargo.toml

@@ -2,19 +2,56 @@
 use core::ops::Range;
 
 pub(crate) struct BoardInfo {
-    pub model: Vec<String>,
+    pub dtb: Range<usize>,
+    pub model: String,
     pub smp: usize,
+    pub mem: Vec<Range<usize>>,
     pub uart: Range<usize>,
     pub test: Range<usize>,
     pub clint: Range<usize>,
 }
 
-pub(crate) fn parse(_opaque: usize) -> BoardInfo {
-    BoardInfo {
-        model: vec![String::from("riscv-virtio,qemu")],
-        smp: 8,
+pub(crate) fn parse(opaque: usize) -> BoardInfo {
+    use dtb_walker::{Dtb, DtbObj, Property, WalkOperation};
+
+    let mut ans = BoardInfo {
+        dtb: opaque..opaque,
+        model: String::new(),
+        smp: 0,
+        mem: vec![],
         uart: 0x1000_0000..0x1000_0100,
         test: 0x10_0000..0x10_1000,
         clint: 0x200_0000..0x201_0000,
-    }
+    };
+    let dtb = unsafe { Dtb::from_raw_parts(opaque as _) }.unwrap();
+    ans.dtb.end += dtb.total_size();
+    dtb.walk(|path, obj| match obj {
+        DtbObj::SubNode { name } => {
+            if path.last().is_empty() && name == b"cpus" {
+                WalkOperation::StepInto
+            } else if path.last() == b"cpus" && name.starts_with(b"cpu@") {
+                ans.smp += 1;
+                WalkOperation::StepOver
+            } else if path.last().is_empty() && name.starts_with(b"memory") {
+                WalkOperation::StepInto
+            } else {
+                WalkOperation::StepOver
+            }
+        }
+        DtbObj::Property(Property::Model(model)) if path.last().is_empty() => {
+            if let Ok(model) = model.as_str() {
+                ans.model = model.into();
+            }
+            WalkOperation::StepOver
+        }
+        DtbObj::Property(Property::Reg(reg)) if path.last().starts_with(b"memory") => {
+            for region in reg {
+                ans.mem.push(region);
+            }
+            WalkOperation::StepOut
+        }
+        DtbObj::Property(_) => WalkOperation::StepOver,
+    });
+
+    ans
 }

rustsbi-qemu/src/device_tree.rs

@@ -105,31 +105,19 @@ extern "C" fn early_trap() -> ! {
     }
 }
 
-use core::sync::atomic::{
-    AtomicBool, AtomicUsize,
-    Ordering::{AcqRel, Acquire},
-};
+use core::sync::atomic::{AtomicBool, Ordering::AcqRel};
 use spin::Once;
 
 #[link_section = ".bss.uninit"]
 static HSM: Once<qemu_hsm::QemuHsm> = Once::new();
 
-#[link_section = ".bss.uninit"]
-static SMP: AtomicUsize = AtomicUsize::new(0);
-
 /// rust 入口。
 extern "C" fn rust_main(_hartid: usize, opaque: usize) {
     unsafe { set_mtvec(early_trap as _) };
 
     #[link_section = ".bss.uninit"]
     static GENESIS: AtomicBool = AtomicBool::new(false);
 
-    let mut smp = SMP.load(Acquire);
-    let mask = 1 << hart_id();
-    while let Err(val) = SMP.compare_exchange(smp, smp | mask, AcqRel, Acquire) {
-        smp = val;
-    }
-
     // 全局初始化过程
     if !GENESIS.swap(true, AcqRel) {
         // 清零 bss 段
@@ -157,18 +145,20 @@ extern "C" fn rust_main(_hartid: usize, opaque: usize) {
 [rustsbi] Implementation     : RustSBI-QEMU Version {ver_impl}
 [rustsbi] Platform Name      : {model:?}
 [rustsbi] Platform SMP       : {smp}
+[rustsbi] Platform Memory    : {mem:#x?}
 [rustsbi] Boot HART          : {hartid}
-[rustsbi] Device Tree Address: {dtb:#x}
+[rustsbi] Device Tree Region : {dtb:#x?}
 [rustsbi] Firmware Address   : {firmware:#x}
 [rustsbi] Supervisor Address : {SUPERVISOR_ENTRY:#x}
 ",
             ver_sbi = rustsbi::VERSION,
             logo = rustsbi::LOGO,
             ver_impl = env!("CARGO_PKG_VERSION"),
             model = board_info.model,
-            smp = SMP.load(Acquire),
+            smp = board_info.smp,
+            mem = board_info.mem[0],
             hartid = hart_id(),
-            dtb = opaque,
+            dtb = board_info.dtb,
             firmware = entry as usize,
         );
     }

rustsbi-qemu/src/main.rs

@@ -13,5 +13,4 @@ riscv = "0.8"
 spin = "0.9"
 r0 = "1"
 lazy_static = { version = "1", features = ["spin_no_std"] }
-serde = { version = "1.0", default-features = false, features = ["derive"] }
-serde-device-tree = { git = "https://github.com/rustsbi/serde-device-tree.git", rev = "b8c2da9", default-features = false }
+dtb-walker = { git = "https://github.com/YdrMaster/dtb-walker.git", rev = "0ef2209" }

test-kernel/Cargo.toml

@@ -16,7 +16,6 @@ extern crate sbi_rt as sbi;
 
 #[macro_use]
 mod console;
-mod device_tree;
 mod test;
 
 mod constants {
@@ -68,7 +67,7 @@ static mut EXPECTED: [Option<Trap>; 8] = [None; 8];
 extern "C" fn primary_rust_main(hartid: usize, dtb_pa: usize) -> ! {
     zero_bss();
 
-    let smp = device_tree::parse_smp(dtb_pa);
+    let smp = parse_smp(dtb_pa);
     println!(
         r"
  _____         _     _  __                    _
@@ -256,3 +255,26 @@ fn zero_bss() {
     }
     unsafe { r0::zero_bss(&mut sbss, &mut ebss) };
 }
+
+fn parse_smp(dtb_pa: usize) -> usize {
+    use dtb_walker::{Dtb, DtbObj, WalkOperation};
+
+    let mut smp = 0usize;
+    unsafe { Dtb::from_raw_parts(dtb_pa as _) }
+        .unwrap()
+        .walk(|path, obj| match obj {
+            DtbObj::SubNode { name } => {
+                if path.last().is_empty() && name == b"cpus" {
+                    WalkOperation::StepInto
+                } else if path.last() == b"cpus" && name.starts_with(b"cpu@") {
+                    smp += 1;
+                    WalkOperation::StepOver
+                } else {
+                    WalkOperation::StepOver
+                }
+            }
+            DtbObj::Property(_) => WalkOperation::StepOver,
+        });
+
+    smp
+}