A new batch of RISC-V releases are now available at crates.io
! Here we enumerate the most important changes, but please read the CHANGELOG.md
files for further details
riscv
v0.14.0
@rmsyn added new CSRs. Also, MSRV is now 1.67
riscv-peripheral
v0.3.0
This crate experienced a full rework, so the code corresponding to RISC-V peripherals is more natural for PACS generated with svd2rust
riscv-rt
v0.15.0
We added the device
and memory
features to allow PACs to simplify the linking process, similar to cortex-m-rt
. If you enable these features, the link.x
file will include the device.x
and/or memory.x
files. In this way, just including link.x
in your binary is enough.
The __pre_init
symbol has disappeared from riscv-rt
by default. If you need it, you must activate the pre_init
feature. Also, note that the riscv_rt::pre_init
has been deprecated, as it is unsound to execute Rust code before RAM initialization. Instead, use assembly.
We removed weak symbols, as currently stable Rust does not support weak linkage and LTOs. Now, we use _default_*
symbols. Once weak linkage is available in stable Rust, we plan to go back to weak symbols. Thanks, @rslawson !