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the order of virtual address checking and ignore translation need to be clarified

Status: Open.

#99 In riscv/riscv-j-extension;

· qin996 opened on Mar 30, 2025

Question regarding trigger matching

Status: Open.

#98 In riscv/riscv-j-extension;

· jiahzhang opened on Mar 19, 2025

how to deal with pointer masking when vsstatus.MXR or sstatus.MXR is set

Status: Open.

#97 In riscv/riscv-j-extension;

· qin996 opened on Mar 17, 2025

in the PM spec--"Alternatively, an implementation may choose to "waste" TLB capacity by having up to 4 duplicate entries for each page." Why are there duplicate entries for each page?

Status: Open.

#95 In riscv/riscv-j-extension;

· chara811 opened on Mar 5, 2025

A figure for how to apply pointer masking

Status: Open.

#77 In riscv/riscv-j-extension;

· romanheros opened on May 14, 2024

About J Extension implementations questions

Status: Open.

#34 In riscv/riscv-j-extension;

· ghost opened on Feb 26, 2023

why new instruction for a subset of FENCE.I

Status: Open.

#16 In riscv/riscv-j-extension;

· jnk0le opened on Jan 8, 2022