Skip to content

Conversation

@Maleehaakbar
Copy link

@Maleehaakbar Maleehaakbar commented Dec 3, 2024

  1. Implement mtvt to provide support of CLIC vectored mode in RV32 architecture.
  2. Following renode console shows support of MTVT CSR .So that firmware that uses CLIC vectored mode can be run and tested on renode. It is tested on zephyr for andes based RV32 SoC.
    Screenshot from 2024-12-04 01-07-35
    3.Required support is also added in tlib.
    Add support for mtvt CSR in RISCV32 architecture antmicro/tlib#17

@CLAassistant
Copy link

CLAassistant commented Dec 3, 2024

CLA assistant check
All committers have signed the CLA.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants