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2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
Original file line number Diff line number Diff line change
Expand Up @@ -1056,7 +1056,7 @@ static int amdgpu_cs_patch_ibs(struct amdgpu_cs_parser *p,
kptr += va_start - (m->start * AMDGPU_GPU_PAGE_SIZE);

if (ring->funcs->parse_cs) {
memcpy(ib->ptr, kptr, ib->length_dw * 4);
memcpy_fromio(ib->ptr, kptr, ib->length_dw * 4);
amdgpu_bo_kunmap(aobj);

r = amdgpu_ring_parse_cs(ring, p, job, ib);
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
Original file line number Diff line number Diff line change
Expand Up @@ -1486,7 +1486,7 @@ static int amdgpu_device_wb_init(struct amdgpu_device *adev)
memset(&adev->wb.used, 0, sizeof(adev->wb.used));

/* clear wb memory */
memset((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t) * 8);
memset_io((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t) * 8);
}

return 0;
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
Original file line number Diff line number Diff line change
Expand Up @@ -370,7 +370,7 @@ int amdgpu_gfx_kiq_init(struct amdgpu_device *adev,
return r;
}

memset(hpd, 0, hpd_size);
memset_io(hpd, 0, hpd_size);

r = amdgpu_bo_reserve(kiq->eop_obj, true);
if (unlikely(r != 0))
Expand Down
8 changes: 4 additions & 4 deletions drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
Original file line number Diff line number Diff line change
Expand Up @@ -291,7 +291,7 @@ int amdgpu_mes_create_process(struct amdgpu_device *adev, int pasid,
DRM_ERROR("failed to allocate process context bo\n");
goto clean_up_memory;
}
memset(process->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
memset_io(process->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);

/*
* Avoid taking any other locks under MES lock to avoid circular
Expand Down Expand Up @@ -415,7 +415,7 @@ int amdgpu_mes_add_gang(struct amdgpu_device *adev, int pasid,
DRM_ERROR("failed to allocate process context bo\n");
goto clean_up_mem;
}
memset(gang->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);
memset_io(gang->gang_ctx_cpu_ptr, 0, AMDGPU_MES_GANG_CTX_SIZE);

/*
* Avoid taking any other locks under MES lock to avoid circular
Expand Down Expand Up @@ -563,7 +563,7 @@ static int amdgpu_mes_queue_alloc_mqd(struct amdgpu_device *adev,
dev_warn(adev->dev, "failed to create queue mqd bo (%d)", r);
return r;
}
memset(q->mqd_cpu_ptr, 0, mqd_size);
memset_io(q->mqd_cpu_ptr, 0, mqd_size);

r = amdgpu_bo_reserve(q->mqd_obj, false);
if (unlikely(r != 0))
Expand Down Expand Up @@ -1279,7 +1279,7 @@ int amdgpu_mes_ctx_alloc_meta_data(struct amdgpu_device *adev,
if (!ctx_data->meta_data_obj)
return -ENOMEM;

memset(ctx_data->meta_data_ptr, 0,
memset_io(ctx_data->meta_data_ptr, 0,
sizeof(struct amdgpu_mes_ctx_meta_data));

return 0;
Expand Down
18 changes: 9 additions & 9 deletions drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
Original file line number Diff line number Diff line change
Expand Up @@ -671,9 +671,9 @@ psp_cmd_submit_buf(struct psp_context *psp,
if (psp->adev->no_hw_access)
return 0;

memset(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE);
memset_io(psp->cmd_buf_mem, 0, PSP_CMD_BUFFER_SIZE);

memcpy(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp));
memcpy_toio(psp->cmd_buf_mem, cmd, sizeof(struct psp_gfx_cmd_resp));

index = atomic_inc_return(&psp->fence_value);
ret = psp_ring_cmd_submit(psp, psp->cmd_buf_mc_addr, fence_mc_addr, index);
Expand Down Expand Up @@ -702,7 +702,7 @@ psp_cmd_submit_buf(struct psp_context *psp,
skip_unsupport = (psp->cmd_buf_mem->resp.status == TEE_ERROR_NOT_SUPPORTED ||
psp->cmd_buf_mem->resp.status == PSP_ERR_UNKNOWN_COMMAND) && amdgpu_sriov_vf(psp->adev);

memcpy(&cmd->resp, &psp->cmd_buf_mem->resp, sizeof(struct psp_gfx_resp));
memcpy_fromio(&cmd->resp, &psp->cmd_buf_mem->resp, sizeof(struct psp_gfx_resp));

/* In some cases, psp response status is not 0 even there is no
* problem while the command is submitted. Some version of PSP FW
Expand Down Expand Up @@ -1026,8 +1026,8 @@ static int psp_rl_load(struct amdgpu_device *adev)

cmd = acquire_psp_cmd_buf(psp);

memset(psp->fw_pri_buf, 0, PSP_1_MEG);
memcpy(psp->fw_pri_buf, psp->rl.start_addr, psp->rl.size_bytes);
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
memcpy_toio(psp->fw_pri_buf, psp->rl.start_addr, psp->rl.size_bytes);

cmd->cmd_id = GFX_CMD_ID_LOAD_IP_FW;
cmd->cmd.cmd_load_ip_fw.fw_phy_addr_lo = lower_32_bits(psp->fw_pri_mc_addr);
Expand Down Expand Up @@ -2875,7 +2875,7 @@ static int psp_load_fw(struct amdgpu_device *adev)
/* should not destroy ring, only stop */
psp_ring_stop(psp, PSP_RING_TYPE__KM);
} else {
memset(psp->fence_buf, 0, PSP_FENCE_BUFFER_SIZE);
memset_io(psp->fence_buf, 0, PSP_FENCE_BUFFER_SIZE);

ret = psp_ring_init(psp, PSP_RING_TYPE__KM);
if (ret) {
Expand Down Expand Up @@ -3223,7 +3223,7 @@ int psp_ring_cmd_submit(struct psp_context *psp,
}

/* Initialize KM RB frame */
memset(write_frame, 0, sizeof(struct psp_gfx_rb_frame));
memset_io(write_frame, 0, sizeof(struct psp_gfx_rb_frame));

/* Update KM RB frame */
write_frame->cmd_buf_addr_hi = upper_32_bits(cmd_buf_mc_addr);
Expand Down Expand Up @@ -3835,8 +3835,8 @@ void psp_copy_fw(struct psp_context *psp, uint8_t *start_addr, uint32_t bin_size
if (!drm_dev_enter(adev_to_drm(psp->adev), &idx))
return;

memset(psp->fw_pri_buf, 0, PSP_1_MEG);
memcpy(psp->fw_pri_buf, start_addr, bin_size);
memset_io(psp->fw_pri_buf, 0, PSP_1_MEG);
memcpy_toio(psp->fw_pri_buf, start_addr, bin_size);

drm_dev_exit(idx);
}
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@ int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
return r;
}

memset(sa_manager->cpu_ptr, 0, size);
memset_io(sa_manager->cpu_ptr, 0, size);
drm_suballoc_manager_init(&sa_manager->base, size, suballoc_align);
return r;
}
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c
Original file line number Diff line number Diff line change
Expand Up @@ -240,7 +240,7 @@ int amdgpu_seq64_init(struct amdgpu_device *adev)
return r;
}

memset(adev->seq64.cpu_base_addr, 0, AMDGPU_VA_RESERVED_SEQ64_SIZE);
memset_io(adev->seq64.cpu_base_addr, 0, AMDGPU_VA_RESERVED_SEQ64_SIZE);

adev->seq64.num_sem = AMDGPU_MAX_SEQ64_SLOTS;
memset(&adev->seq64.used, 0, sizeof(adev->seq64.used));
Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
Original file line number Diff line number Diff line change
Expand Up @@ -1120,7 +1120,7 @@ static struct ttm_tt *amdgpu_ttm_tt_create(struct ttm_buffer_object *bo,
if (abo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
caching = ttm_write_combined;
else
caching = ttm_cached;
caching = ttm_uncached;

/* allocate space for the uninitialized page entries */
if (ttm_sg_tt_init(&gtt->ttm, bo, page_flags, caching)) {
Expand Down
6 changes: 3 additions & 3 deletions drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
Original file line number Diff line number Diff line change
Expand Up @@ -1078,7 +1078,7 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
le32_to_cpu(header->ucode_array_offset_bytes);
}

memcpy(ucode->kaddr, ucode_addr, ucode->ucode_size);
memcpy_toio(ucode->kaddr, ucode_addr, ucode->ucode_size);

return 0;
}
Expand All @@ -1102,7 +1102,7 @@ static int amdgpu_ucode_patch_jt(struct amdgpu_firmware_info *ucode,
src_addr = (uint8_t *)ucode->fw->data +
le32_to_cpu(comm_hdr->ucode_array_offset_bytes) +
(le32_to_cpu(header->jt_offset) * 4);
memcpy(dst_addr, src_addr, le32_to_cpu(header->jt_size) * 4);
memcpy_toio(dst_addr, src_addr, le32_to_cpu(header->jt_size) * 4);

return 0;
}
Expand All @@ -1121,7 +1121,7 @@ int amdgpu_ucode_create_bo(struct amdgpu_device *adev)
dev_err(adev->dev, "failed to create kernel buffer for firmware.fw_buf\n");
return -ENOMEM;
} else if (amdgpu_sriov_vf(adev)) {
memset(adev->firmware.fw_buf_ptr, 0, adev->firmware.fw_size);
memset_io(adev->firmware.fw_buf_ptr, 0, adev->firmware.fw_size);
}
}
return 0;
Expand Down
4 changes: 2 additions & 2 deletions drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
Original file line number Diff line number Diff line change
Expand Up @@ -1202,7 +1202,7 @@ int amdgpu_uvd_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
{
struct amdgpu_device *adev = ring->adev;
struct amdgpu_bo *bo = adev->uvd.ib_bo;
uint32_t *msg;
volatile uint32_t *msg;
int i;

msg = amdgpu_bo_kptr(bo);
Expand Down Expand Up @@ -1230,7 +1230,7 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
{
struct amdgpu_device *adev = ring->adev;
struct amdgpu_bo *bo = NULL;
uint32_t *msg;
volatile uint32_t *msg;
int r, i;

if (direct) {
Expand Down
6 changes: 3 additions & 3 deletions drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
Original file line number Diff line number Diff line change
Expand Up @@ -593,7 +593,7 @@ static int amdgpu_vcn_dec_get_create_msg(struct amdgpu_ring *ring, uint32_t hand
struct amdgpu_ib *ib)
{
struct amdgpu_device *adev = ring->adev;
uint32_t *msg;
volatile uint32_t *msg;
int r, i;

memset(ib, 0, sizeof(*ib));
Expand Down Expand Up @@ -628,7 +628,7 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
struct amdgpu_ib *ib)
{
struct amdgpu_device *adev = ring->adev;
uint32_t *msg;
volatile uint32_t *msg;
int r, i;

memset(ib, 0, sizeof(*ib));
Expand Down Expand Up @@ -751,7 +751,7 @@ static int amdgpu_vcn_dec_sw_send_msg(struct amdgpu_ring *ring,
ib->ptr[ib->length_dw++] = cpu_to_le32(AMDGPU_VCN_IB_FLAG_DECODE_BUFFER);
decode_buffer = (struct amdgpu_vcn_decode_buffer *)&(ib->ptr[ib->length_dw]);
ib->length_dw += sizeof(struct amdgpu_vcn_decode_buffer) / 4;
memset(decode_buffer, 0, sizeof(struct amdgpu_vcn_decode_buffer));
memset_io(decode_buffer, 0, sizeof(struct amdgpu_vcn_decode_buffer));

decode_buffer->valid_buf_flag |= cpu_to_le32(AMDGPU_VCN_CMD_FLAG_MSG_BUFFER);
decode_buffer->msg_buffer_address_hi = cpu_to_le32(addr >> 32);
Expand Down
18 changes: 9 additions & 9 deletions drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
Original file line number Diff line number Diff line change
Expand Up @@ -4375,7 +4375,7 @@ static int gfx_v10_0_mec_init(struct amdgpu_device *adev)
return r;
}

memset(hpd, 0, mec_hpd_size);
memset_io(hpd, 0, mec_hpd_size);

amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj);
amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
Expand Down Expand Up @@ -5577,10 +5577,10 @@ static void gfx_v10_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device *ade
if (fw_size > toc_fw_size)
fw_size = toc_fw_size;

memcpy(ptr + toc_offset, fw_data, fw_size);
memcpy_toio(ptr + toc_offset, fw_data, fw_size);

if (fw_size < toc_fw_size)
memset(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);
memset_io(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);
}

static void gfx_v10_0_rlc_backdoor_autoload_copy_toc_ucode(struct amdgpu_device *adev)
Expand Down Expand Up @@ -6592,7 +6592,7 @@ static void gfx_v10_0_kiq_setting(struct amdgpu_ring *ring)
}

static void gfx_v10_0_gfx_mqd_set_priority(struct amdgpu_device *adev,
struct v10_gfx_mqd *mqd,
volatile struct v10_gfx_mqd *mqd,
struct amdgpu_mqd_prop *prop)
{
bool priority = 0;
Expand All @@ -6612,7 +6612,7 @@ static void gfx_v10_0_gfx_mqd_set_priority(struct amdgpu_device *adev,
static int gfx_v10_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,
struct amdgpu_mqd_prop *prop)
{
struct v10_gfx_mqd *mqd = m;
volatile struct v10_gfx_mqd *mqd = m;
uint64_t hqd_gpu_addr, wb_gpu_addr;
uint32_t tmp;
uint32_t rb_bufsz;
Expand Down Expand Up @@ -6699,7 +6699,7 @@ static int gfx_v10_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
int mqd_idx = ring - &adev->gfx.gfx_ring[0];

if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
memset((void *)mqd, 0, sizeof(*mqd));
memset_io((void *)mqd, 0, sizeof(*mqd));
mutex_lock(&adev->srbm_mutex);
nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
amdgpu_ring_init_mqd(ring);
Expand Down Expand Up @@ -6769,7 +6769,7 @@ static int gfx_v10_0_cp_async_gfx_ring_resume(struct amdgpu_device *adev)
static int gfx_v10_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
struct amdgpu_mqd_prop *prop)
{
struct v10_compute_mqd *mqd = m;
volatile struct v10_compute_mqd *mqd = m;
uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
uint32_t tmp;

Expand Down Expand Up @@ -7013,7 +7013,7 @@ static int gfx_v10_0_kiq_init_queue(struct amdgpu_ring *ring)
nv_grbm_select(adev, 0, 0, 0, 0);
mutex_unlock(&adev->srbm_mutex);
} else {
memset((void *)mqd, 0, sizeof(*mqd));
memset_io((void *)mqd, 0, sizeof(*mqd));
if (amdgpu_sriov_vf(adev) && adev->in_suspend)
amdgpu_ring_clear_ring(ring);
mutex_lock(&adev->srbm_mutex);
Expand All @@ -7037,7 +7037,7 @@ static int gfx_v10_0_kcq_init_queue(struct amdgpu_ring *ring, bool restore)
int mqd_idx = ring - &adev->gfx.compute_ring[0];

if (!restore && !amdgpu_in_reset(adev) && !adev->in_suspend) {
memset((void *)mqd, 0, sizeof(*mqd));
memset_io((void *)mqd, 0, sizeof(*mqd));
mutex_lock(&adev->srbm_mutex);
nv_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
amdgpu_ring_init_mqd(ring);
Expand Down
16 changes: 8 additions & 8 deletions drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
Original file line number Diff line number Diff line change
Expand Up @@ -955,7 +955,7 @@ static int gfx_v11_0_mec_init(struct amdgpu_device *adev)
return r;
}

memset(hpd, 0, mec_hpd_size);
memset_io(hpd, 0, mec_hpd_size);

amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj);
amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);
Expand Down Expand Up @@ -1257,10 +1257,10 @@ static void gfx_v11_0_rlc_backdoor_autoload_copy_ucode(struct amdgpu_device *ade
if (fw_size > toc_fw_size)
fw_size = toc_fw_size;

memcpy(ptr + toc_offset, fw_data, fw_size);
memcpy_toio(ptr + toc_offset, fw_data, fw_size);

if (fw_size < toc_fw_size)
memset(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);
memset_io(ptr + toc_offset + fw_size, 0, toc_fw_size - fw_size);

if ((id != SOC21_FIRMWARE_ID_RS64_PFP) && (id != SOC21_FIRMWARE_ID_RS64_ME))
*(uint64_t *)fw_autoload_mask |= 1ULL << id;
Expand Down Expand Up @@ -3921,7 +3921,7 @@ static void gfx_v11_0_gfx_mqd_set_priority(struct amdgpu_device *adev,
static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m,
struct amdgpu_mqd_prop *prop)
{
struct v11_gfx_mqd *mqd = m;
volatile struct v11_gfx_mqd *mqd = m;
uint64_t hqd_gpu_addr, wb_gpu_addr;
uint32_t tmp;
uint32_t rb_bufsz;
Expand Down Expand Up @@ -4008,7 +4008,7 @@ static int gfx_v11_0_kgq_init_queue(struct amdgpu_ring *ring, bool reset)
int mqd_idx = ring - &adev->gfx.gfx_ring[0];

if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
memset((void *)mqd, 0, sizeof(*mqd));
memset_io((void *)mqd, 0, sizeof(*mqd));
mutex_lock(&adev->srbm_mutex);
soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
amdgpu_ring_init_mqd(ring);
Expand Down Expand Up @@ -4062,7 +4062,7 @@ static int gfx_v11_0_cp_async_gfx_ring_resume(struct amdgpu_device *adev)
static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
struct amdgpu_mqd_prop *prop)
{
struct v11_compute_mqd *mqd = m;
volatile struct v11_compute_mqd *mqd = m;
uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
uint32_t tmp;

Expand Down Expand Up @@ -4321,7 +4321,7 @@ static int gfx_v11_0_kiq_init_queue(struct amdgpu_ring *ring)
soc21_grbm_select(adev, 0, 0, 0, 0);
mutex_unlock(&adev->srbm_mutex);
} else {
memset((void *)mqd, 0, sizeof(*mqd));
memset_io((void *)mqd, 0, sizeof(*mqd));
if (amdgpu_sriov_vf(adev) && adev->in_suspend)
amdgpu_ring_clear_ring(ring);
mutex_lock(&adev->srbm_mutex);
Expand All @@ -4345,7 +4345,7 @@ static int gfx_v11_0_kcq_init_queue(struct amdgpu_ring *ring, bool reset)
int mqd_idx = ring - &adev->gfx.compute_ring[0];

if (!reset && !amdgpu_in_reset(adev) && !adev->in_suspend) {
memset((void *)mqd, 0, sizeof(*mqd));
memset_io((void *)mqd, 0, sizeof(*mqd));
mutex_lock(&adev->srbm_mutex);
soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
amdgpu_ring_init_mqd(ring);
Expand Down
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