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chore(deps): patch riscv ^0.6 and riscv ^0.7 as well
Fixes build failures due to the use of now-removed `llvm_asm!`.
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Cargo.lock

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Cargo.toml

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@@ -26,16 +26,28 @@ members = [
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]
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resolver = "2"
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[patch.crates-io.riscv]
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[patch.crates-io.riscv-0p5]
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# We need to enable `riscv/inline-asm` to work around
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# <https://github.com/rust-embedded/riscv/issues/69>. However, some external
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# crates depend on `riscv` 0.5.x, which uses the old form of `asm!` with the
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# LLVM syntax, which isn't supported by the current compiler anymore. Therefore,
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# we have to patch `riscv` 0.5.x with the version that uses the form of inline
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# assembler supported by the current compiler.
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git = "https://github.com/r3-os/rust-riscv.git"
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package = "riscv"
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branch = "refresh/0.5"
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[patch.crates-io.riscv-0p6]
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# Ditto.
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git = "https://github.com/r3-os/rust-riscv.git"
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package = "riscv"
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branch = "refresh/0.6"
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[patch.crates-io.riscv-0p7]
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# Ditto.
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git = "https://github.com/rust-embedded/riscv.git"
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package = "riscv"
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[patch.crates-io.riscv-rt]
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# FIXME: This is a work-around for
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# <https://github.com/rust-embedded/riscv/issues/69>. The upstream version of

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