chore(deps): upgrade the customized version of riscv ^0.5

Fixes build failures due to the use of now-removed `llvm_asm!`.

Author: yvt

Cargo.lock

@@ -30,9 +30,9 @@ resolver = "2"
 # We need to enable `riscv/inline-asm` to work around
 # <https://github.com/rust-embedded/riscv/issues/69>. However, some external
 # crates depend on `riscv` 0.5.x, which uses the old form of `asm!` with the
-# LLVM syntax, which was moved to `llvm_asm!` when the new inline assembler
-# syntax has landed. Therefore, we have to patch `riscv` 0.5.x with the version
-# that uses the form of inline assembler supported by the current compiler.
+# LLVM syntax, which isn't supported by the current compiler anymore. Therefore,
+# we have to patch `riscv` 0.5.x with the version that uses the form of inline
+# assembler supported by the current compiler.
 git = "https://github.com/r3-os/rust-riscv.git"
 branch = "refresh/0.5"