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Optimize tbe_input_combine_with_length_cuda on AMD #4430

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Optimize tbe_input_combine_with_length_cuda on AMD #4430

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13 changes: 10 additions & 3 deletions fbgemm_gpu/src/input_combine_ops/input_combine.cu
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Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,11 @@ DEVICE_INLINE void vec_copy_with_implicit_type_cast(
const uint64_t src_bound) {
// TODO: Use vector load/store if address aligns with the vector type
const src_t* const src = reinterpret_cast<src_t*>(src_addr);
#ifdef __HIP_PLATFORM_AMD__
#pragma unroll 4
#else
#pragma unroll
#endif
for (uint64_t i = 0; i < VEC_WIDTH && src_offset + i < src_bound; i++) {
dst[dst_offset + i] = src[src_offset + i];
}
Expand Down Expand Up @@ -130,9 +134,12 @@ std::tuple<Tensor, Tensor, Tensor> tbe_input_combine_with_length_cuda(
.dtype(at::kFloat)
.device(at::kCUDA, at::cuda::current_device()));

// Each thread loads 4 elements (rule of thumb; should work well with 32-bit
// inputs)
constexpr uint32_t VEC_WIDTH = 4;
// Each thread loads VEC_WIDTH elements (tuned for specific hardware)
#ifdef __HIP_PLATFORM_AMD__
constexpr uint32_t VEC_WIDTH = 32;
#else
constexpr uint32_t VEC_WIDTH = 8;
#endif
constexpr uint32_t NUM_WARPS_PER_BLOCK = kMaxThreads / kWarpSize;
const auto num_warps_per_list =
div_round_up(max_list_size, kWarpSize * VEC_WIDTH);
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