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add support for riscv64 timer #13324

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5d2bddc
Add RISC64 Timer Implemention.To ensure the timer works properly on t…
heyujiao99 Jul 4, 2025
54c1e76
use early-clobber in opal_config_asm.m4, remove irrelated code, and u…
heyujiao99 Jul 5, 2025
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3 changes: 3 additions & 0 deletions config/opal_config_asm.m4
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Original file line number Diff line number Diff line change
Expand Up @@ -538,6 +538,9 @@ AC_DEFUN([OPAL_CHECK_INLINE_C_GCC],[
powerpc-*|powerpc64-*|powerpcle-*|powerpc64le-*|rs6000-*|ppc-*)
opal_gcc_inline_assign='"1: li %0,0" : "=&r"(ret)'
;;
riscv64*)
opal_gcc_inline_assign='"li %0, 0" : "=&r"(ret)'
;;
esac

AS_IF([test "$opal_gcc_inline_assign" != ""],
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1 change: 1 addition & 0 deletions opal/include/opal/sys/Makefile.am
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Original file line number Diff line number Diff line change
Expand Up @@ -42,4 +42,5 @@ headers += \
include opal/sys/x86_64/Makefile.am
include opal/sys/arm64/Makefile.am
include opal/sys/powerpc/Makefile.am
include opal/sys/riscv64/Makefile.am
include opal/sys/gcc_builtin/Makefile.am
15 changes: 15 additions & 0 deletions opal/include/opal/sys/riscv64/Makefile.am
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@@ -0,0 +1,15 @@
#
# Copyright (c) 2025 Software System Team, SANECHIPS.
# All rights reserved.
# $COPYRIGHT$
#
# Additional copyrights may follow
#
# $HEADER$
#

# This makefile.am does not stand on its own - it is included from opal/include/Makefile.am

headers += \
opal/sys/riscv64/timer.h

33 changes: 33 additions & 0 deletions opal/include/opal/sys/riscv64/timer.h
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@@ -0,0 +1,33 @@
/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */
/*
* Copyright (c) 2025 Software System Team, SANECHIPS.
* All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
*
* $HEADER$
*/

#ifndef OPAL_SYS_ARCH_TIMER_H
#define OPAL_SYS_ARCH_TIMER_H 1

typedef uint64_t opal_timer_t;

#if OPAL_C_GCC_INLINE_ASSEMBLY

static inline opal_timer_t opal_sys_timer_get_cycles(void)
{
opal_timer_t ret;
__asm__ __volatile__("fence iorw, iorw" ::: "memory");
__asm__ __volatile__("rdtime %0" : "=r"(ret));

return ret;
}

#define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1

#endif /* OPAL_C_GCC_INLINE_ASSEMBLY */

#endif /* ! OPAL_SYS_ARCH_TIMER_H */

2 changes: 2 additions & 0 deletions opal/include/opal/sys/timer.h
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Expand Up @@ -63,6 +63,8 @@ BEGIN_C_DECLS
# include "opal/sys/arm64/timer.h"
#elif defined(PLATFORM_ARCH_POWERPC)
# include "opal/sys/powerpc/timer.h"
#elif defined(PLATFORM_ARCH_RISCV)
# include "opal/sys/riscv64/timer.h"
#endif

#ifndef DOXYGEN
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2 changes: 1 addition & 1 deletion opal/mca/timer/linux/configure.m4
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Expand Up @@ -47,7 +47,7 @@ AC_DEFUN([MCA_opal_timer_linux_CONFIG],[
[timer_linux_happy="no"])])

case "${host}" in
i?86-*linux*|x86_64*linux*|ia64-*linux*|powerpc-*linux*|powerpc64-*linux*|powerpc64le-*linux*|powerpcle-*linux*|sparc*-*linux*|aarch64-*linux*)
i?86-*linux*|x86_64*linux*|ia64-*linux*|powerpc-*linux*|powerpc64-*linux*|powerpc64le-*linux*|powerpcle-*linux*|sparc*-*linux*|aarch64-*linux*|riscv64-*linux*)
AS_IF([test "$timer_linux_happy" = "yes"],
[AS_IF([test -r "/proc/cpuinfo"],
[timer_linux_happy="yes"],
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17 changes: 17 additions & 0 deletions opal/mca/timer/linux/timer_linux_component.c
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Expand Up @@ -18,6 +18,8 @@
* Copyright (c) 2016 Broadcom Limited. All rights reserved.
* Copyright (c) 2022 Amazon.com, Inc. or its affiliates.
* All Rights reserved.
* Copyright (c) 2025 Software System Team, SANECHIPS.
* All rights reserved.
* $COPYRIGHT$
*
* Additional copyrights may follow
Expand All @@ -29,6 +31,7 @@

#include <string.h>
#include <time.h>
#include <arpa/inet.h>

#include "opal/constants.h"
#include "opal/mca/timer/base/base.h"
Expand Down Expand Up @@ -177,6 +180,20 @@ static int opal_timer_linux_find_freq(void)
}
}

#if defined(PLATFORM_ARCH_RISCV)
if (0 == opal_timer_linux_freq) {
/* read timebase-frequency in device-tree */
FILE *fp_rv = fopen("/proc/device-tree/cpus/timebase-frequency", "rb");
if (NULL == fp_rv) {
return OPAL_ERR_IN_ERRNO;
}
if (1 == fread(&opal_timer_linux_freq, 4, 1, fp_rv)){
opal_timer_linux_freq = ntohl(opal_timer_linux_freq);
}
fclose(fp_rv);
}
#endif

fclose(fp);

/* convert the timer frequency to MHz to avoid an extra operation when
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