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Preprocessor for ULP/RTC macros #43

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Merged
merged 29 commits into from
Aug 9, 2021
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79db90f
add units test for the .set directive
wnienhaus Jul 22, 2021
84d734d
add support for left aligned assembler directives (e.g. .set)
wnienhaus Jul 22, 2021
ec81ecc
fix a crash bug where BSS size calculation was attempted on the value…
wnienhaus Jul 22, 2021
c184924
raise error when attempting to store values in .bss section
wnienhaus Jul 29, 2021
25d34b0
fix reference to non-existing variable
wnienhaus Jul 22, 2021
76a81ac
fix typo in comment of instruction definition
wnienhaus Jul 22, 2021
56f4530
add support for the .global directive. only symbols flagged as global…
wnienhaus Jul 22, 2021
9907b10
let SymbolTable.export() optionally export non-global symbols too
wnienhaus Jul 22, 2021
27ab850
support ULP opcodes in upper case
wnienhaus Jul 22, 2021
54b117e
add a compatibility test for the recent fixes and improvements
wnienhaus Jul 22, 2021
feb42dc
add support for evaluating expressions
wnienhaus Jul 22, 2021
87507c9
add a compatibility test for evaluating expressions
wnienhaus Jul 23, 2021
99352a3
docs: add that expressions are now supported
wnienhaus Jul 29, 2021
d76fd26
add preprocessor that can replace simple #define values in code
wnienhaus Jul 23, 2021
4dded94
allow assembler to skip comment removal to avoid removing comments twice
wnienhaus Aug 7, 2021
219f939
fix evaluation of expressions during first assembler pass
wnienhaus Jul 25, 2021
5c3eeb8
remove no-longer-needed pass dependent code from SymbolTable
wnienhaus Jul 26, 2021
3e8c0d5
add support for macros such as WRITE_RTC_REG
wnienhaus Jul 26, 2021
ac1de99
add simple include file processing
wnienhaus Jul 26, 2021
8d88fd1
add support for using a btree database (DefinesDB) to store defines f…
wnienhaus Jul 27, 2021
46f1442
add special handling for the BIT macro used in the esp-idf framework
wnienhaus Jul 27, 2021
2f6ee78
add include processor tool for populating a defines.db from include f…
wnienhaus Jul 28, 2021
69ae946
add compatibility tests using good example code off the net
wnienhaus Jul 28, 2021
4f90f76
add documentation for the preprocessor
wnienhaus Jul 29, 2021
d44384f
fix use of treg field in i_move instruction to match binutils-esp32 o…
wnienhaus Jul 28, 2021
254adf9
allow specifying the address for reg_rd and reg_wr in 32-bit words
wnienhaus Jul 28, 2021
c3bd101
support .int data type
wnienhaus Jul 29, 2021
2a0a39a
refactor: small improvements based on PR comments.
wnienhaus Aug 9, 2021
47d5e8a
Updated LICENSE file and added AUTHORS file
wnienhaus Aug 9, 2021
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44 changes: 44 additions & 0 deletions tests/compat/expr.S
Original file line number Diff line number Diff line change
@@ -0,0 +1,44 @@
.set adc_channel, 6

.set adc_oversampling_factor_log, 2
.set adc_oversampling_factor, (1 << adc_oversampling_factor_log)

.data

result:
.long 0

.text
.global entry
entry:
move r0, 0
stage_rst

measure:
adc r1, 0, adc_channel + 1
add r0, r0, r1

stage_inc 1
jumps measure, adc_oversampling_factor, lt

rsh r0, r0, adc_oversampling_factor_log

move r3, result
st r0, r3, 0

#test that expressions evaluate correctly for all supported operators
move r3, 1+2
move r3, 3-5
move r3, -5
move r3, 2*3
move r3, 4/2
move r3, 4 % 3
move r3, 0xff << 2
move r3, 0xff >> 1
move r3, (0xabcdef | 0xff) & 0xff
move r3, 0x1234 & ~2
move r3, 42|4&0xf # 46 (4&0xf is evaluated first)
move r3, (42|4)&0xf # 14 (42|4 is evaluated first)
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this is a bit strange mix of a real-world code example and some lines of assembler testing.

maybe separate these lines at least?

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Did you mean into a separate file, or maybe I can move them below the exit: halt line and add a comment that they are all "artificial" examples?

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whatever you like better.


exit:
halt