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[mlir][x86vector] AVX2 i8/i32 Dot Op #147908
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Original file line number | Diff line number | Diff line change |
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@@ -420,6 +420,57 @@ def DotOp : AVX_LowOp<"dot", [Pure, | |
}]; | ||
} | ||
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//----------------------------------------------------------------------------// | ||
// AVX Int8 Dot | ||
//----------------------------------------------------------------------------// | ||
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def DotInt8Op : AVX_Op<"dot.i32", [Pure, | ||
X86IntrinsicOpInterface, | ||
AllTypesMatch<["a", "b"]>, | ||
AllTypesMatch<["src", "dst"]>, | ||
TypesMatchWith<"`a` has same elements as `src`", | ||
"src", "a", | ||
"VectorType::get({::llvm::cast<VectorType>($_self).getShape()[0]}, " | ||
"IntegerType::get($_self.getContext(), 32))"> | ||
]> { | ||
let summary = "Dot Int8 op"; | ||
let description = [{ | ||
The `dot` op is an AVX2-I32/I8 specific op that can lower to the proper | ||
LLVMAVX2-INT8/32 operation `llvm.vpdpbssd` depending on the width of MLIR | ||
vectors it is applied to. | ||
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#### From the Intel Intrinsics Guide: | ||
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Multiply groups of 4 adjacent pairs of signed 8-bit integers in `a` with | ||
corresponding signed 8-bit integers in `b`, producing 4 intermediate signed 16-bit | ||
results. Sum these 4 results with the corresponding 32-bit integer in `src`, and | ||
store the packed 32-bit results in `dst`. | ||
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Example: | ||
```mlir | ||
%dst = x86vector.avx.dot %src, %a, %b : vector<8xi32> -> vector<8xi32> | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. nit: incomplete op name in the example |
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``` | ||
}]; | ||
let arguments = (ins VectorOfLengthAndType<[4, 8], [I32]>:$src, | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Let's call it |
||
VectorOfLengthAndType<[4, 8], [I32]>:$a, | ||
VectorOfLengthAndType<[4, 8], [I32]>:$b | ||
); | ||
let results = (outs VectorOfLengthAndType<[4, 8], [I32]>:$dst); | ||
let assemblyFormat = | ||
"$src `,` $a `,` $b attr-dict `:` type($a) `->` type($src)"; | ||
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let extraClassDeclaration = [{ | ||
std::string getIntrinsicName() { | ||
std::string intr = "llvm.x86.avx2.vpdpbssd"; | ||
VectorType vecType = getSrc().getType(); | ||
unsigned elemBitWidth = vecType.getElementTypeBitWidth(); | ||
unsigned opBitWidth = vecType.getShape()[0] * elemBitWidth; | ||
intr += "." + std::to_string(opBitWidth); | ||
return intr; | ||
} | ||
}]; | ||
} | ||
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//----------------------------------------------------------------------------// | ||
// AVX: Convert BF16/F16 to F32 and broadcast into packed F32 | ||
//----------------------------------------------------------------------------// | ||
|
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Let's lean more into its intended
i8 * i8 -> i32
semantics and align closer to the dot bf16.I'd suggest renaming the op to
dot.i8
and make the op inputs take appropriately sized vectors ofi8
.The inputs can be packed into
i32
as a part ofgetIntrinsicOperands
through bitcasts to align with the underlying intrinsic API.