[Clang] Respect MS layout attributes during CUDA/HIP device compilation #146620
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@llvm/pr-subscribers-backend-powerpc @llvm/pr-subscribers-clang Author: Yaxun (Sam) Liu (yxsamliu) ChangesThis patch fixes an issue where Microsoft-specific layout attributes, such as __declspec(empty_bases), were ignored during CUDA/HIP device compilation on a Windows host. This caused a critical memory layout mismatch between host and device objects, breaking libraries that rely on these attributes for ABI compatibility. The fix introduces a centralized hasMicrosoftRecordLayout() check within the TargetInfo class. This check is aware of the auxiliary (host) target and is set during TargetInfo::adjust if the host uses a Microsoft ABI. The empty_bases, layout_version, and msvc::no_unique_address attributes now use this centralized flag, ensuring device code respects them and maintains layout consistency with the host. Fixes: #146047 Patch is 22.32 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/146620.diff 20 Files Affected:
diff --git a/clang/include/clang/Basic/Attr.td b/clang/include/clang/Basic/Attr.td
index 340f439a45bb9..0912a004549ae 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -492,9 +492,22 @@ def TargetHasDLLImportExport : TargetSpec {
def TargetItaniumCXXABI : TargetSpec {
let CustomCode = [{ Target.getCXXABI().isItaniumFamily() }];
}
+
def TargetMicrosoftCXXABI : TargetArch<["x86", "x86_64", "arm", "thumb", "aarch64"]> {
let CustomCode = [{ Target.getCXXABI().isMicrosoft() }];
}
+
+// The target follows Microsoft record layout. Usually this happens in two
+// cases: 1. the target itself has Microsoft C++ ABI, e.g. x86_64 in MSVC
+// environment on Windows 2. an offloading target e.g. amdgcn or nvptx with
+// a host target in MSVC environment on Windows.
+def TargetMicrosoftRecordLayout : TargetArch<["x86", "x86_64", "arm", "thumb",
+ "aarch64", "amdgcn", "nvptx",
+ "nvptx64", "spirv", "spirv32",
+ "spirv64"]> {
+ let CustomCode = [{ Target.hasMicrosoftRecordLayout() }];
+}
+
def TargetELF : TargetSpec {
let ObjectFormats = ["ELF"];
}
@@ -1789,7 +1802,7 @@ def Destructor : InheritableAttr {
let Documentation = [CtorDtorDocs];
}
-def EmptyBases : InheritableAttr, TargetSpecificAttr<TargetMicrosoftCXXABI> {
+def EmptyBases : InheritableAttr, TargetSpecificAttr<TargetMicrosoftRecordLayout> {
let Spellings = [Declspec<"empty_bases">];
let Subjects = SubjectList<[CXXRecord]>;
let Documentation = [EmptyBasesDocs];
@@ -2021,7 +2034,7 @@ def Restrict : InheritableAttr {
let Documentation = [RestrictDocs];
}
-def LayoutVersion : InheritableAttr, TargetSpecificAttr<TargetMicrosoftCXXABI> {
+def LayoutVersion : InheritableAttr, TargetSpecificAttr<TargetMicrosoftRecordLayout> {
let Spellings = [Declspec<"layout_version">];
let Args = [UnsignedArgument<"Version">];
let Subjects = SubjectList<[CXXRecord]>;
@@ -2239,7 +2252,7 @@ def NoUniqueAddress : InheritableAttr {
let Spellings = [CXX11<"", "no_unique_address", 201803>, CXX11<"msvc", "no_unique_address", 201803>];
let TargetSpecificSpellings = [
TargetSpecificSpelling<TargetItaniumCXXABI, [CXX11<"", "no_unique_address", 201803>]>,
- TargetSpecificSpelling<TargetMicrosoftCXXABI, [CXX11<"msvc", "no_unique_address", 201803>]>,
+ TargetSpecificSpelling<TargetMicrosoftRecordLayout, [CXX11<"msvc", "no_unique_address", 201803>]>,
];
let Documentation = [NoUniqueAddressDocs];
}
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 5c9031cc69dbb..f2cb0e6ab3f5d 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -289,6 +289,8 @@ class TargetInfo : public TransferrableTargetInfo,
std::optional<llvm::Triple> DarwinTargetVariantTriple;
+ bool HasMicrosoftRecordLayout = false;
+
// TargetInfo Constructor. Default initializes all fields.
TargetInfo(const llvm::Triple &T);
@@ -1325,7 +1327,8 @@ class TargetInfo : public TransferrableTargetInfo,
/// Apply changes to the target information with respect to certain
/// language options which change the target configuration and adjust
/// the language based on the target options where applicable.
- virtual void adjust(DiagnosticsEngine &Diags, LangOptions &Opts);
+ virtual void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux);
/// Initialize the map with the default set of target features for the
/// CPU this should include all legal feature strings on the target.
@@ -1840,6 +1843,8 @@ class TargetInfo : public TransferrableTargetInfo,
virtual void setAuxTarget(const TargetInfo *Aux) {}
+ bool hasMicrosoftRecordLayout() const { return HasMicrosoftRecordLayout; }
+
/// Whether target allows debuginfo types for decl only variables/functions.
virtual bool allowDebugInfoForExternalRef() const { return false; }
diff --git a/clang/lib/AST/RecordLayoutBuilder.cpp b/clang/lib/AST/RecordLayoutBuilder.cpp
index 6d819031cbef4..6a74e98dd92d8 100644
--- a/clang/lib/AST/RecordLayoutBuilder.cpp
+++ b/clang/lib/AST/RecordLayoutBuilder.cpp
@@ -2458,15 +2458,6 @@ static bool mustSkipTailPadding(TargetCXXABI ABI, const CXXRecordDecl *RD) {
llvm_unreachable("bad tail-padding use kind");
}
-static bool isMsLayout(const ASTContext &Context) {
- // Check if it's CUDA device compilation; ensure layout consistency with host.
- if (Context.getLangOpts().CUDA && Context.getLangOpts().CUDAIsDevice &&
- Context.getAuxTargetInfo())
- return Context.getAuxTargetInfo()->getCXXABI().isMicrosoft();
-
- return Context.getTargetInfo().getCXXABI().isMicrosoft();
-}
-
// This section contains an implementation of struct layout that is, up to the
// included tests, compatible with cl.exe (2013). The layout produced is
// significantly different than those produced by the Itanium ABI. Here we note
@@ -3399,7 +3390,7 @@ ASTContext::getASTRecordLayout(const RecordDecl *D) const {
const ASTRecordLayout *NewEntry = nullptr;
- if (isMsLayout(*this)) {
+ if (getTargetInfo().hasMicrosoftRecordLayout()) {
if (const auto *RD = dyn_cast<CXXRecordDecl>(D)) {
EmptySubobjectMap EmptySubobjects(*this, RD);
MicrosoftRecordLayoutBuilder Builder(*this, &EmptySubobjects);
@@ -3656,7 +3647,8 @@ static void DumpRecordLayout(raw_ostream &OS, const RecordDecl *RD,
bool HasOwnVBPtr = Layout.hasOwnVBPtr();
// Vtable pointer.
- if (CXXRD->isDynamicClass() && !PrimaryBase && !isMsLayout(C)) {
+ if (CXXRD->isDynamicClass() && !PrimaryBase &&
+ !C.getTargetInfo().hasMicrosoftRecordLayout()) {
PrintOffset(OS, Offset, IndentLevel);
OS << '(' << *RD << " vtable pointer)\n";
} else if (HasOwnVFPtr) {
@@ -3754,7 +3746,7 @@ static void DumpRecordLayout(raw_ostream &OS, const RecordDecl *RD,
PrintIndentNoOffset(OS, IndentLevel - 1);
OS << "[sizeof=" << Layout.getSize().getQuantity();
- if (CXXRD && !isMsLayout(C))
+ if (CXXRD && !C.getTargetInfo().hasMicrosoftRecordLayout())
OS << ", dsize=" << Layout.getDataSize().getQuantity();
OS << ", align=" << Layout.getAlignment().getQuantity();
if (C.getTargetInfo().defaultsToAIXPowerAlignment())
@@ -3793,7 +3785,7 @@ void ASTContext::DumpRecordLayout(const RecordDecl *RD, raw_ostream &OS,
OS << "\nLayout: ";
OS << "<ASTRecordLayout\n";
OS << " Size:" << toBits(Info.getSize()) << "\n";
- if (!isMsLayout(*this))
+ if (!getTargetInfo().hasMicrosoftRecordLayout())
OS << " DataSize:" << toBits(Info.getDataSize()) << "\n";
OS << " Alignment:" << toBits(Info.getAlignment()) << "\n";
if (Target->defaultsToAIXPowerAlignment())
diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index 9429a316a9196..09b6a1f091e92 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -176,6 +176,8 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) {
? TargetCXXABI::Microsoft
: TargetCXXABI::GenericItanium);
+ HasMicrosoftRecordLayout = TheCXXABI.isMicrosoft();
+
// Default to an empty address space map.
AddrSpaceMap = &DefaultAddrSpaceMap;
UseAddrSpaceMapMangling = false;
@@ -410,7 +412,8 @@ bool TargetInfo::isTypeSigned(IntType T) {
/// Apply changes to the target information with respect to certain
/// language options which change the target configuration and adjust
/// the language based on the target options where applicable.
-void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
+void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) {
if (Opts.NoBitFieldTypeAlign)
UseBitFieldTypeAlignment = false;
@@ -550,6 +553,10 @@ void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
if (Opts.FakeAddressSpaceMap)
AddrSpaceMap = &FakeAddrSpaceMap;
+
+ // Check if it's CUDA device compilation; ensure layout consistency with host.
+ if (Opts.CUDA && Opts.CUDAIsDevice && Aux && !HasMicrosoftRecordLayout)
+ HasMicrosoftRecordLayout = Aux->getCXXABI().isMicrosoft();
}
bool TargetInfo::initFeatureMap(
diff --git a/clang/lib/Basic/Targets/AMDGPU.cpp b/clang/lib/Basic/Targets/AMDGPU.cpp
index 8d5489becc02c..cebcfa3c2bc40 100644
--- a/clang/lib/Basic/Targets/AMDGPU.cpp
+++ b/clang/lib/Basic/Targets/AMDGPU.cpp
@@ -271,8 +271,9 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
HalfArgsAndReturns = true;
}
-void AMDGPUTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
- TargetInfo::adjust(Diags, Opts);
+void AMDGPUTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) {
+ TargetInfo::adjust(Diags, Opts, Aux);
// ToDo: There are still a few places using default address space as private
// address space in OpenCL, which needs to be cleaned up, then the references
// to OpenCL can be removed from the following line.
diff --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h
index 509128f3cf070..c13d559bb6586 100644
--- a/clang/lib/Basic/Targets/AMDGPU.h
+++ b/clang/lib/Basic/Targets/AMDGPU.h
@@ -89,7 +89,8 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
void setAddressSpaceMap(bool DefaultIsPrivate);
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override;
uint64_t getPointerWidthV(LangAS AS) const override {
if (isR600(getTriple()))
diff --git a/clang/lib/Basic/Targets/DirectX.h b/clang/lib/Basic/Targets/DirectX.h
index 1729a014c2dec..17240cf358902 100644
--- a/clang/lib/Basic/Targets/DirectX.h
+++ b/clang/lib/Basic/Targets/DirectX.h
@@ -95,8 +95,9 @@ class LLVM_LIBRARY_VISIBILITY DirectXTargetInfo : public TargetInfo {
return TargetInfo::VoidPtrBuiltinVaList;
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
// The static values this addresses do not apply outside of the same thread
// This protection is neither available nor needed
Opts.ThreadsafeStatics = false;
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 05a5dc2d94256..ef18354525fac 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -758,10 +758,11 @@ void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
llvm::PPC::fillValidCPUList(Values);
}
-void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
+void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) {
if (HasAltivec)
Opts.AltiVec = 1;
- TargetInfo::adjust(Diags, Opts);
+ TargetInfo::adjust(Diags, Opts, Aux);
if (LongDoubleFormat != &llvm::APFloat::IEEEdouble())
LongDoubleFormat = Opts.PPCIEEELongDouble
? &llvm::APFloat::IEEEquad()
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index 17057cef97a57..9f3a4cd2da716 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -88,7 +88,8 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
}
// Set the language option for altivec based on our value.
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override;
// Note: GCC recognizes the following additional cpus:
// 401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
diff --git a/clang/lib/Basic/Targets/SPIR.cpp b/clang/lib/Basic/Targets/SPIR.cpp
index 2336fb3ef0495..69d75d25ecb7b 100644
--- a/clang/lib/Basic/Targets/SPIR.cpp
+++ b/clang/lib/Basic/Targets/SPIR.cpp
@@ -149,6 +149,7 @@ void SPIRV64AMDGCNTargetInfo::getTargetDefines(const LangOptions &Opts,
void SPIRV64AMDGCNTargetInfo::setAuxTarget(const TargetInfo *Aux) {
assert(Aux && "Cannot invoke setAuxTarget without a valid auxiliary target!");
+ TargetInfo::setAuxTarget(Aux);
// This is a 1:1 copy of AMDGPUTargetInfo::setAuxTarget()
assert(HalfFormat == Aux->HalfFormat);
diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index b416a01f0f374..1abf798d93129 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -205,8 +205,9 @@ class LLVM_LIBRARY_VISIBILITY BaseSPIRTargetInfo : public TargetInfo {
AddrSpaceMap = DefaultIsGeneric ? &SPIRDefIsGenMap : &SPIRDefIsPrivMap;
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
// FIXME: SYCL specification considers unannotated pointers and references
// to be pointing to the generic address space. See section 5.9.3 of
// SYCL 2020 specification.
@@ -383,8 +384,9 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64TargetInfo : public BaseSPIRVTargetInfo {
std::optional<LangAS> getConstantAddressSpace() const override {
return ConstantAS;
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- BaseSPIRVTargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ BaseSPIRVTargetInfo::adjust(Diags, Opts, Aux);
// opencl_constant will map to UniformConstant in SPIR-V
if (Opts.OpenCL)
ConstantAS = LangAS::opencl_constant;
@@ -446,8 +448,9 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64AMDGCNTargetInfo final
void setAuxTarget(const TargetInfo *Aux) override;
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
}
bool hasInt128Type() const override { return TargetInfo::hasInt128Type(); }
diff --git a/clang/lib/Basic/Targets/WebAssembly.cpp b/clang/lib/Basic/Targets/WebAssembly.cpp
index f19c57f1a3a50..af25d25a3af3b 100644
--- a/clang/lib/Basic/Targets/WebAssembly.cpp
+++ b/clang/lib/Basic/Targets/WebAssembly.cpp
@@ -372,9 +372,9 @@ WebAssemblyTargetInfo::getTargetBuiltins() const {
return {{&BuiltinStrings, BuiltinInfos}};
}
-void WebAssemblyTargetInfo::adjust(DiagnosticsEngine &Diags,
- LangOptions &Opts) {
- TargetInfo::adjust(Diags, Opts);
+void WebAssemblyTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) {
+ TargetInfo::adjust(Diags, Opts, Aux);
// Turn off POSIXThreads and ThreadModel so that we don't predefine _REENTRANT
// or __STDCPP_THREADS__ if we will eventually end up stripping atomics
// because they are unsupported.
diff --git a/clang/lib/Basic/Targets/WebAssembly.h b/clang/lib/Basic/Targets/WebAssembly.h
index d5aee5c0bd0eb..57b366cb9c750 100644
--- a/clang/lib/Basic/Targets/WebAssembly.h
+++ b/clang/lib/Basic/Targets/WebAssembly.h
@@ -176,7 +176,8 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public TargetInfo {
bool hasProtectedVisibility() const override { return false; }
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override;
};
class LLVM_LIBRARY_VISIBILITY WebAssembly32TargetInfo
diff --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h
index ecb31ffa4750f..ebc59c92f4c24 100644
--- a/clang/lib/Basic/Targets/X86.h
+++ b/clang/lib/Basic/Targets/X86.h
@@ -441,8 +441,9 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
uint64_t getPointerAlignV(LangAS AddrSpace) const override {
return getPointerWidthV(AddrSpace);
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
IsOpenCL = Opts.OpenCL;
}
@@ -839,8 +840,9 @@ class LLVM_LIBRARY_VISIBILITY X86_64TargetInfo : public X86TargetInfo {
return llvm::IntegerType::MAX_INT_BITS;
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
IsOpenCL = Opts.OpenCL;
}
diff --git a/clang/lib/Frontend/ASTUnit.cpp b/clang/lib/Frontend/ASTUnit.cpp
index 3beff3d6d849f..4f566de53899e 100644
--- a/clang/lib/Frontend/ASTUnit.cpp
+++ b/clang/lib/Frontend/ASTUnit.cpp
@@ -631,7 +631,7 @@ class ASTInfoCollector : public ASTReaderListener {
//
// FIXME: We shouldn't need to do this, the target should be immutable once
// created. This complexity should be lifted elsewhere.
- Target->adjust(PP.getDiagnostics(), LangOpt);
+ Target->adjust(PP.getDiagnostics(), LangOpt, /*AuxTarget=*/nullptr);
// Initialize the preprocessor.
PP.Initialize(*Target);
diff --git a/clang/lib/Frontend/CompilerInstance.cpp b/clang/lib/Frontend/CompilerInstance.cpp
index 09a66b652518f..6f8cc01eeed88 100644
--- a/clang/lib/Frontend/CompilerInstance.cpp
+++ b/clang/lib/Frontend/CompilerInstance.cpp
@@ -148,7 +148,7 @@ bool CompilerInstance::createTarget() {
// Inform the target of the language options.
// FIXME: We shouldn't need to do this, the target should be immutable once
// created. This complexity should be lifted elsewhere.
- getTarget().adjust(getDiagnostics(), getLangOpts());
+ getTarget().adjust(getDiagnostics(), getLangOpts(), getAuxTarget());
if (auto *Aux = getAuxTarget())
getTarget().setAuxTarget(Aux);
@@ -454,7 +454,7 @@ void CompilerInstance::createPreprocessor(TranslationUnitKind TUKind) {
getSourceManager(), *HeaderInfo, *this,
/*IdentifierInfoLookup=*/nullptr,
/*OwnsHeaderSearch=*/true, TUKind);
- getTarget().adjust(getDiagnostics(), getLangOpts());
+ getTarget().adjust(getDiagnostics(), getLangOpts(), getAuxTarget());
PP->Initialize(getTarget(), getAuxTarget());
if (PPOpts.DetailedRecord)
diff --git a/clang/lib/Interpreter/Interpreter.cpp b/clang/lib/Interpreter/Interpreter.cpp
index 2f110659d19a4..73d84fe840521 100644
--- a/clang/lib/Interpreter/Interpreter.cpp
+++ b/clang/lib/Interpreter/Interpreter.cpp
@@ -132,7 +132,8 @@ CreateCI(const llvm::opt::ArgStringList &Argv) {
"Initialization failed. "
"Target is missing");
- Clang->getTarget().adjust(Clang->getDiagnostics(), Clang->getLangOpts());
+ Clang->getTarget().adjust(Clang->getDiagnostics(), Clang->getLangOpts(),
+ Clang->getAuxTarget());
// Don't clear the AST before backend codegen since we do codegen multiple
// times, reusing the same AST.
diff --git a/clang/test/Layout/ms-x86-declspec-empty_bases.cpp b/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
index 4a4c1a5da38df..af63f24100857 100644
--- a/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
+++ b/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
@@ -2,6 +2,17 @@
// RUN: | FileCheck %s
// RUN: %clang_cc1 -fno-rtti -triple x86_64-pc-win32 -fms-extensions -fdump-record-layouts -fsyntax-only %s 2>/dev/null \
// RUN: | FileCheck %s
+// RUN: %clang_cc1 -fno-rtti -triple amdgcn-amd-amdhsa -fms-extensions \
+// RUN: -target-cpu gfx1200 -aux-triple x86_64-pc-win32 -fcuda-is-device \
+// RUN: -fdump-record-layouts -fsyntax-only -xhip %s 2>/dev/null \
+// RUN: | FileCheck %s
+// RUN: %clang...
[truncated]
|
|
@llvm/pr-subscribers-backend-webassembly Author: Yaxun (Sam) Liu (yxsamliu) ChangesThis patch fixes an issue where Microsoft-specific layout attributes, such as __declspec(empty_bases), were ignored during CUDA/HIP device compilation on a Windows host. This caused a critical memory layout mismatch between host and device objects, breaking libraries that rely on these attributes for ABI compatibility. The fix introduces a centralized hasMicrosoftRecordLayout() check within the TargetInfo class. This check is aware of the auxiliary (host) target and is set during TargetInfo::adjust if the host uses a Microsoft ABI. The empty_bases, layout_version, and msvc::no_unique_address attributes now use this centralized flag, ensuring device code respects them and maintains layout consistency with the host. Fixes: #146047 Patch is 22.32 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/146620.diff 20 Files Affected:
diff --git a/clang/include/clang/Basic/Attr.td b/clang/include/clang/Basic/Attr.td
index 340f439a45bb9..0912a004549ae 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -492,9 +492,22 @@ def TargetHasDLLImportExport : TargetSpec {
def TargetItaniumCXXABI : TargetSpec {
let CustomCode = [{ Target.getCXXABI().isItaniumFamily() }];
}
+
def TargetMicrosoftCXXABI : TargetArch<["x86", "x86_64", "arm", "thumb", "aarch64"]> {
let CustomCode = [{ Target.getCXXABI().isMicrosoft() }];
}
+
+// The target follows Microsoft record layout. Usually this happens in two
+// cases: 1. the target itself has Microsoft C++ ABI, e.g. x86_64 in MSVC
+// environment on Windows 2. an offloading target e.g. amdgcn or nvptx with
+// a host target in MSVC environment on Windows.
+def TargetMicrosoftRecordLayout : TargetArch<["x86", "x86_64", "arm", "thumb",
+ "aarch64", "amdgcn", "nvptx",
+ "nvptx64", "spirv", "spirv32",
+ "spirv64"]> {
+ let CustomCode = [{ Target.hasMicrosoftRecordLayout() }];
+}
+
def TargetELF : TargetSpec {
let ObjectFormats = ["ELF"];
}
@@ -1789,7 +1802,7 @@ def Destructor : InheritableAttr {
let Documentation = [CtorDtorDocs];
}
-def EmptyBases : InheritableAttr, TargetSpecificAttr<TargetMicrosoftCXXABI> {
+def EmptyBases : InheritableAttr, TargetSpecificAttr<TargetMicrosoftRecordLayout> {
let Spellings = [Declspec<"empty_bases">];
let Subjects = SubjectList<[CXXRecord]>;
let Documentation = [EmptyBasesDocs];
@@ -2021,7 +2034,7 @@ def Restrict : InheritableAttr {
let Documentation = [RestrictDocs];
}
-def LayoutVersion : InheritableAttr, TargetSpecificAttr<TargetMicrosoftCXXABI> {
+def LayoutVersion : InheritableAttr, TargetSpecificAttr<TargetMicrosoftRecordLayout> {
let Spellings = [Declspec<"layout_version">];
let Args = [UnsignedArgument<"Version">];
let Subjects = SubjectList<[CXXRecord]>;
@@ -2239,7 +2252,7 @@ def NoUniqueAddress : InheritableAttr {
let Spellings = [CXX11<"", "no_unique_address", 201803>, CXX11<"msvc", "no_unique_address", 201803>];
let TargetSpecificSpellings = [
TargetSpecificSpelling<TargetItaniumCXXABI, [CXX11<"", "no_unique_address", 201803>]>,
- TargetSpecificSpelling<TargetMicrosoftCXXABI, [CXX11<"msvc", "no_unique_address", 201803>]>,
+ TargetSpecificSpelling<TargetMicrosoftRecordLayout, [CXX11<"msvc", "no_unique_address", 201803>]>,
];
let Documentation = [NoUniqueAddressDocs];
}
diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h
index 5c9031cc69dbb..f2cb0e6ab3f5d 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -289,6 +289,8 @@ class TargetInfo : public TransferrableTargetInfo,
std::optional<llvm::Triple> DarwinTargetVariantTriple;
+ bool HasMicrosoftRecordLayout = false;
+
// TargetInfo Constructor. Default initializes all fields.
TargetInfo(const llvm::Triple &T);
@@ -1325,7 +1327,8 @@ class TargetInfo : public TransferrableTargetInfo,
/// Apply changes to the target information with respect to certain
/// language options which change the target configuration and adjust
/// the language based on the target options where applicable.
- virtual void adjust(DiagnosticsEngine &Diags, LangOptions &Opts);
+ virtual void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux);
/// Initialize the map with the default set of target features for the
/// CPU this should include all legal feature strings on the target.
@@ -1840,6 +1843,8 @@ class TargetInfo : public TransferrableTargetInfo,
virtual void setAuxTarget(const TargetInfo *Aux) {}
+ bool hasMicrosoftRecordLayout() const { return HasMicrosoftRecordLayout; }
+
/// Whether target allows debuginfo types for decl only variables/functions.
virtual bool allowDebugInfoForExternalRef() const { return false; }
diff --git a/clang/lib/AST/RecordLayoutBuilder.cpp b/clang/lib/AST/RecordLayoutBuilder.cpp
index 6d819031cbef4..6a74e98dd92d8 100644
--- a/clang/lib/AST/RecordLayoutBuilder.cpp
+++ b/clang/lib/AST/RecordLayoutBuilder.cpp
@@ -2458,15 +2458,6 @@ static bool mustSkipTailPadding(TargetCXXABI ABI, const CXXRecordDecl *RD) {
llvm_unreachable("bad tail-padding use kind");
}
-static bool isMsLayout(const ASTContext &Context) {
- // Check if it's CUDA device compilation; ensure layout consistency with host.
- if (Context.getLangOpts().CUDA && Context.getLangOpts().CUDAIsDevice &&
- Context.getAuxTargetInfo())
- return Context.getAuxTargetInfo()->getCXXABI().isMicrosoft();
-
- return Context.getTargetInfo().getCXXABI().isMicrosoft();
-}
-
// This section contains an implementation of struct layout that is, up to the
// included tests, compatible with cl.exe (2013). The layout produced is
// significantly different than those produced by the Itanium ABI. Here we note
@@ -3399,7 +3390,7 @@ ASTContext::getASTRecordLayout(const RecordDecl *D) const {
const ASTRecordLayout *NewEntry = nullptr;
- if (isMsLayout(*this)) {
+ if (getTargetInfo().hasMicrosoftRecordLayout()) {
if (const auto *RD = dyn_cast<CXXRecordDecl>(D)) {
EmptySubobjectMap EmptySubobjects(*this, RD);
MicrosoftRecordLayoutBuilder Builder(*this, &EmptySubobjects);
@@ -3656,7 +3647,8 @@ static void DumpRecordLayout(raw_ostream &OS, const RecordDecl *RD,
bool HasOwnVBPtr = Layout.hasOwnVBPtr();
// Vtable pointer.
- if (CXXRD->isDynamicClass() && !PrimaryBase && !isMsLayout(C)) {
+ if (CXXRD->isDynamicClass() && !PrimaryBase &&
+ !C.getTargetInfo().hasMicrosoftRecordLayout()) {
PrintOffset(OS, Offset, IndentLevel);
OS << '(' << *RD << " vtable pointer)\n";
} else if (HasOwnVFPtr) {
@@ -3754,7 +3746,7 @@ static void DumpRecordLayout(raw_ostream &OS, const RecordDecl *RD,
PrintIndentNoOffset(OS, IndentLevel - 1);
OS << "[sizeof=" << Layout.getSize().getQuantity();
- if (CXXRD && !isMsLayout(C))
+ if (CXXRD && !C.getTargetInfo().hasMicrosoftRecordLayout())
OS << ", dsize=" << Layout.getDataSize().getQuantity();
OS << ", align=" << Layout.getAlignment().getQuantity();
if (C.getTargetInfo().defaultsToAIXPowerAlignment())
@@ -3793,7 +3785,7 @@ void ASTContext::DumpRecordLayout(const RecordDecl *RD, raw_ostream &OS,
OS << "\nLayout: ";
OS << "<ASTRecordLayout\n";
OS << " Size:" << toBits(Info.getSize()) << "\n";
- if (!isMsLayout(*this))
+ if (!getTargetInfo().hasMicrosoftRecordLayout())
OS << " DataSize:" << toBits(Info.getDataSize()) << "\n";
OS << " Alignment:" << toBits(Info.getAlignment()) << "\n";
if (Target->defaultsToAIXPowerAlignment())
diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index 9429a316a9196..09b6a1f091e92 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -176,6 +176,8 @@ TargetInfo::TargetInfo(const llvm::Triple &T) : Triple(T) {
? TargetCXXABI::Microsoft
: TargetCXXABI::GenericItanium);
+ HasMicrosoftRecordLayout = TheCXXABI.isMicrosoft();
+
// Default to an empty address space map.
AddrSpaceMap = &DefaultAddrSpaceMap;
UseAddrSpaceMapMangling = false;
@@ -410,7 +412,8 @@ bool TargetInfo::isTypeSigned(IntType T) {
/// Apply changes to the target information with respect to certain
/// language options which change the target configuration and adjust
/// the language based on the target options where applicable.
-void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
+void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) {
if (Opts.NoBitFieldTypeAlign)
UseBitFieldTypeAlignment = false;
@@ -550,6 +553,10 @@ void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
if (Opts.FakeAddressSpaceMap)
AddrSpaceMap = &FakeAddrSpaceMap;
+
+ // Check if it's CUDA device compilation; ensure layout consistency with host.
+ if (Opts.CUDA && Opts.CUDAIsDevice && Aux && !HasMicrosoftRecordLayout)
+ HasMicrosoftRecordLayout = Aux->getCXXABI().isMicrosoft();
}
bool TargetInfo::initFeatureMap(
diff --git a/clang/lib/Basic/Targets/AMDGPU.cpp b/clang/lib/Basic/Targets/AMDGPU.cpp
index 8d5489becc02c..cebcfa3c2bc40 100644
--- a/clang/lib/Basic/Targets/AMDGPU.cpp
+++ b/clang/lib/Basic/Targets/AMDGPU.cpp
@@ -271,8 +271,9 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
HalfArgsAndReturns = true;
}
-void AMDGPUTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
- TargetInfo::adjust(Diags, Opts);
+void AMDGPUTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) {
+ TargetInfo::adjust(Diags, Opts, Aux);
// ToDo: There are still a few places using default address space as private
// address space in OpenCL, which needs to be cleaned up, then the references
// to OpenCL can be removed from the following line.
diff --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h
index 509128f3cf070..c13d559bb6586 100644
--- a/clang/lib/Basic/Targets/AMDGPU.h
+++ b/clang/lib/Basic/Targets/AMDGPU.h
@@ -89,7 +89,8 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
void setAddressSpaceMap(bool DefaultIsPrivate);
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override;
uint64_t getPointerWidthV(LangAS AS) const override {
if (isR600(getTriple()))
diff --git a/clang/lib/Basic/Targets/DirectX.h b/clang/lib/Basic/Targets/DirectX.h
index 1729a014c2dec..17240cf358902 100644
--- a/clang/lib/Basic/Targets/DirectX.h
+++ b/clang/lib/Basic/Targets/DirectX.h
@@ -95,8 +95,9 @@ class LLVM_LIBRARY_VISIBILITY DirectXTargetInfo : public TargetInfo {
return TargetInfo::VoidPtrBuiltinVaList;
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
// The static values this addresses do not apply outside of the same thread
// This protection is neither available nor needed
Opts.ThreadsafeStatics = false;
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 05a5dc2d94256..ef18354525fac 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -758,10 +758,11 @@ void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
llvm::PPC::fillValidCPUList(Values);
}
-void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
+void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) {
if (HasAltivec)
Opts.AltiVec = 1;
- TargetInfo::adjust(Diags, Opts);
+ TargetInfo::adjust(Diags, Opts, Aux);
if (LongDoubleFormat != &llvm::APFloat::IEEEdouble())
LongDoubleFormat = Opts.PPCIEEELongDouble
? &llvm::APFloat::IEEEquad()
diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index 17057cef97a57..9f3a4cd2da716 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -88,7 +88,8 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo {
}
// Set the language option for altivec based on our value.
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override;
// Note: GCC recognizes the following additional cpus:
// 401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801,
diff --git a/clang/lib/Basic/Targets/SPIR.cpp b/clang/lib/Basic/Targets/SPIR.cpp
index 2336fb3ef0495..69d75d25ecb7b 100644
--- a/clang/lib/Basic/Targets/SPIR.cpp
+++ b/clang/lib/Basic/Targets/SPIR.cpp
@@ -149,6 +149,7 @@ void SPIRV64AMDGCNTargetInfo::getTargetDefines(const LangOptions &Opts,
void SPIRV64AMDGCNTargetInfo::setAuxTarget(const TargetInfo *Aux) {
assert(Aux && "Cannot invoke setAuxTarget without a valid auxiliary target!");
+ TargetInfo::setAuxTarget(Aux);
// This is a 1:1 copy of AMDGPUTargetInfo::setAuxTarget()
assert(HalfFormat == Aux->HalfFormat);
diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index b416a01f0f374..1abf798d93129 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -205,8 +205,9 @@ class LLVM_LIBRARY_VISIBILITY BaseSPIRTargetInfo : public TargetInfo {
AddrSpaceMap = DefaultIsGeneric ? &SPIRDefIsGenMap : &SPIRDefIsPrivMap;
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
// FIXME: SYCL specification considers unannotated pointers and references
// to be pointing to the generic address space. See section 5.9.3 of
// SYCL 2020 specification.
@@ -383,8 +384,9 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64TargetInfo : public BaseSPIRVTargetInfo {
std::optional<LangAS> getConstantAddressSpace() const override {
return ConstantAS;
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- BaseSPIRVTargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ BaseSPIRVTargetInfo::adjust(Diags, Opts, Aux);
// opencl_constant will map to UniformConstant in SPIR-V
if (Opts.OpenCL)
ConstantAS = LangAS::opencl_constant;
@@ -446,8 +448,9 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64AMDGCNTargetInfo final
void setAuxTarget(const TargetInfo *Aux) override;
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
}
bool hasInt128Type() const override { return TargetInfo::hasInt128Type(); }
diff --git a/clang/lib/Basic/Targets/WebAssembly.cpp b/clang/lib/Basic/Targets/WebAssembly.cpp
index f19c57f1a3a50..af25d25a3af3b 100644
--- a/clang/lib/Basic/Targets/WebAssembly.cpp
+++ b/clang/lib/Basic/Targets/WebAssembly.cpp
@@ -372,9 +372,9 @@ WebAssemblyTargetInfo::getTargetBuiltins() const {
return {{&BuiltinStrings, BuiltinInfos}};
}
-void WebAssemblyTargetInfo::adjust(DiagnosticsEngine &Diags,
- LangOptions &Opts) {
- TargetInfo::adjust(Diags, Opts);
+void WebAssemblyTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) {
+ TargetInfo::adjust(Diags, Opts, Aux);
// Turn off POSIXThreads and ThreadModel so that we don't predefine _REENTRANT
// or __STDCPP_THREADS__ if we will eventually end up stripping atomics
// because they are unsupported.
diff --git a/clang/lib/Basic/Targets/WebAssembly.h b/clang/lib/Basic/Targets/WebAssembly.h
index d5aee5c0bd0eb..57b366cb9c750 100644
--- a/clang/lib/Basic/Targets/WebAssembly.h
+++ b/clang/lib/Basic/Targets/WebAssembly.h
@@ -176,7 +176,8 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public TargetInfo {
bool hasProtectedVisibility() const override { return false; }
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override;
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override;
};
class LLVM_LIBRARY_VISIBILITY WebAssembly32TargetInfo
diff --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h
index ecb31ffa4750f..ebc59c92f4c24 100644
--- a/clang/lib/Basic/Targets/X86.h
+++ b/clang/lib/Basic/Targets/X86.h
@@ -441,8 +441,9 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
uint64_t getPointerAlignV(LangAS AddrSpace) const override {
return getPointerWidthV(AddrSpace);
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
IsOpenCL = Opts.OpenCL;
}
@@ -839,8 +840,9 @@ class LLVM_LIBRARY_VISIBILITY X86_64TargetInfo : public X86TargetInfo {
return llvm::IntegerType::MAX_INT_BITS;
}
- void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override {
- TargetInfo::adjust(Diags, Opts);
+ void adjust(DiagnosticsEngine &Diags, LangOptions &Opts,
+ const TargetInfo *Aux) override {
+ TargetInfo::adjust(Diags, Opts, Aux);
IsOpenCL = Opts.OpenCL;
}
diff --git a/clang/lib/Frontend/ASTUnit.cpp b/clang/lib/Frontend/ASTUnit.cpp
index 3beff3d6d849f..4f566de53899e 100644
--- a/clang/lib/Frontend/ASTUnit.cpp
+++ b/clang/lib/Frontend/ASTUnit.cpp
@@ -631,7 +631,7 @@ class ASTInfoCollector : public ASTReaderListener {
//
// FIXME: We shouldn't need to do this, the target should be immutable once
// created. This complexity should be lifted elsewhere.
- Target->adjust(PP.getDiagnostics(), LangOpt);
+ Target->adjust(PP.getDiagnostics(), LangOpt, /*AuxTarget=*/nullptr);
// Initialize the preprocessor.
PP.Initialize(*Target);
diff --git a/clang/lib/Frontend/CompilerInstance.cpp b/clang/lib/Frontend/CompilerInstance.cpp
index 09a66b652518f..6f8cc01eeed88 100644
--- a/clang/lib/Frontend/CompilerInstance.cpp
+++ b/clang/lib/Frontend/CompilerInstance.cpp
@@ -148,7 +148,7 @@ bool CompilerInstance::createTarget() {
// Inform the target of the language options.
// FIXME: We shouldn't need to do this, the target should be immutable once
// created. This complexity should be lifted elsewhere.
- getTarget().adjust(getDiagnostics(), getLangOpts());
+ getTarget().adjust(getDiagnostics(), getLangOpts(), getAuxTarget());
if (auto *Aux = getAuxTarget())
getTarget().setAuxTarget(Aux);
@@ -454,7 +454,7 @@ void CompilerInstance::createPreprocessor(TranslationUnitKind TUKind) {
getSourceManager(), *HeaderInfo, *this,
/*IdentifierInfoLookup=*/nullptr,
/*OwnsHeaderSearch=*/true, TUKind);
- getTarget().adjust(getDiagnostics(), getLangOpts());
+ getTarget().adjust(getDiagnostics(), getLangOpts(), getAuxTarget());
PP->Initialize(getTarget(), getAuxTarget());
if (PPOpts.DetailedRecord)
diff --git a/clang/lib/Interpreter/Interpreter.cpp b/clang/lib/Interpreter/Interpreter.cpp
index 2f110659d19a4..73d84fe840521 100644
--- a/clang/lib/Interpreter/Interpreter.cpp
+++ b/clang/lib/Interpreter/Interpreter.cpp
@@ -132,7 +132,8 @@ CreateCI(const llvm::opt::ArgStringList &Argv) {
"Initialization failed. "
"Target is missing");
- Clang->getTarget().adjust(Clang->getDiagnostics(), Clang->getLangOpts());
+ Clang->getTarget().adjust(Clang->getDiagnostics(), Clang->getLangOpts(),
+ Clang->getAuxTarget());
// Don't clear the AST before backend codegen since we do codegen multiple
// times, reusing the same AST.
diff --git a/clang/test/Layout/ms-x86-declspec-empty_bases.cpp b/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
index 4a4c1a5da38df..af63f24100857 100644
--- a/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
+++ b/clang/test/Layout/ms-x86-declspec-empty_bases.cpp
@@ -2,6 +2,17 @@
// RUN: | FileCheck %s
// RUN: %clang_cc1 -fno-rtti -triple x86_64-pc-win32 -fms-extensions -fdump-record-layouts -fsyntax-only %s 2>/dev/null \
// RUN: | FileCheck %s
+// RUN: %clang_cc1 -fno-rtti -triple amdgcn-amd-amdhsa -fms-extensions \
+// RUN: -target-cpu gfx1200 -aux-triple x86_64-pc-win32 -fcuda-is-device \
+// RUN: -fdump-record-layouts -fsyntax-only -xhip %s 2>/dev/null \
+// RUN: | FileCheck %s
+// RUN: %clang...
[truncated]
|
This patch fixes an issue where Microsoft-specific layout attributes, such as __declspec(empty_bases), were ignored during CUDA/HIP device compilation on a Windows host. This caused a critical memory layout mismatch between host and device objects, breaking libraries that rely on these attributes for ABI compatibility. The fix introduces a centralized hasMicrosoftRecordLayout() check within the TargetInfo class. This check is aware of the auxiliary (host) target and is set during TargetInfo::adjust if the host uses a Microsoft ABI. The empty_bases, layout_version, and msvc::no_unique_address attributes now use this centralized flag, ensuring device code respects them and maintains layout consistency with the host. Fixes: llvm#146047
Do we have to worry about ABI versioning for folks relying on Clang's current behavior? |
The patch only affects structs with MS-specific attributes in device code. Unless users have a device library binary that use these attributes, they won't be affected by the ABI change. It is quite unlikely that users use these MS-specific attributes in their device library code since device library code are usually independent of host OS. If they do, these library binary are already broken since they have incompatible layout vs host. Therefore, instead of trying to keep the old layout, they need to be recompiled. |
Excellent, thank you! We can address that if someone actually runs into a problem in practice. :-) |
|
This broke the LLDB CI: Mind taking a look? Seems like a simple API update |
working on it. will open a PR soon |
|
yxsamliu
added a commit
that referenced
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Jul 9, 2025
Fixes buildbot failure on lldb-x86_64-debian due to #146620 https://lab.llvm.org/buildbot/#/builders/162/builds/26414 Update LLDB calls to TargetInfo::adjust() to use the new 3-parameter signature introduced in beea2a9. Pass nullptr for AuxTarget since LLDB doesn't use auxiliary targets in these contexts.
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… (#147727) Fixes buildbot failure on lldb-x86_64-debian due to llvm/llvm-project#146620 https://lab.llvm.org/buildbot/#/builders/162/builds/26414 Update LLDB calls to TargetInfo::adjust() to use the new 3-parameter signature introduced in beea2a9. Pass nullptr for AuxTarget since LLDB doesn't use auxiliary targets in these contexts.
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This patch fixes an issue where Microsoft-specific layout attributes, such as __declspec(empty_bases), were ignored during CUDA/HIP device compilation on a Windows host. This caused a critical memory layout mismatch between host and device objects, breaking libraries that rely on these attributes for ABI compatibility.
The fix introduces a centralized hasMicrosoftRecordLayout() check within the TargetInfo class. This check is aware of the auxiliary (host) target and is set during TargetInfo::adjust if the host uses a Microsoft ABI.
The empty_bases, layout_version, and msvc::no_unique_address attributes now use this centralized flag, ensuring device code respects them and maintains layout consistency with the host.
Fixes: #146047