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[Scalar] Dedicated pass for identifying redundant operations on packed bytes #146364
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48 changes: 48 additions & 0 deletions
48
llvm/include/llvm/Transforms/Scalar/PackedIntegerCombinePass.h
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,48 @@ | ||
//===- PackedIntegerCombinePass.h -------------------------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
/// \file | ||
/// | ||
/// This file provides the interface for LLVM's Packed Integer Combine pass. | ||
/// This pass tries to treat integers as packed chunks of individual bytes, | ||
/// and leverage this to coalesce needlessly fragmented | ||
/// computations. | ||
/// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef LLVM_TRANSFORMS_SCALAR_PACKEDINTCOMBINE_H | ||
#define LLVM_TRANSFORMS_SCALAR_PACKEDINTCOMBINE_H | ||
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#include "llvm/IR/PassManager.h" | ||
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namespace llvm { | ||
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struct PackedIntegerCombineOptions { | ||
/// Maximum number of iterations to isolate final packed instructions. | ||
unsigned MaxCollectionIterations = 2; | ||
/// Aggressively rewrite packed instructions. | ||
bool AggressiveRewriting = false; | ||
}; | ||
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class PackedIntegerCombinePass | ||
: public PassInfoMixin<PackedIntegerCombinePass> { | ||
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PackedIntegerCombineOptions Options; | ||
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public: | ||
PackedIntegerCombinePass(PackedIntegerCombineOptions Options = {}) | ||
: Options(Options) {} | ||
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LLVM_ABI PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); | ||
LLVM_ABI void | ||
printPipeline(raw_ostream &OS, | ||
function_ref<StringRef(StringRef)> MapClassName2PassName); | ||
}; | ||
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} // end namespace llvm | ||
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#endif // LLVM_TRANSFORMS_SCALAR_PACKEDINTCOMBINE_H |
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Original file line number | Diff line number | Diff line change |
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@@ -104,6 +104,7 @@ | |
#include "llvm/Transforms/Scalar/InferAddressSpaces.h" | ||
#include "llvm/Transforms/Scalar/LoopDataPrefetch.h" | ||
#include "llvm/Transforms/Scalar/NaryReassociate.h" | ||
#include "llvm/Transforms/Scalar/PackedIntegerCombinePass.h" | ||
#include "llvm/Transforms/Scalar/SeparateConstOffsetFromGEP.h" | ||
#include "llvm/Transforms/Scalar/Sink.h" | ||
#include "llvm/Transforms/Scalar/StraightLineStrengthReduce.h" | ||
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@@ -1378,8 +1379,11 @@ void AMDGPUPassConfig::addCodeGenPrepare() { | |
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TargetPassConfig::addCodeGenPrepare(); | ||
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if (isPassEnabled(EnableLoadStoreVectorizer)) | ||
if (isPassEnabled(EnableLoadStoreVectorizer)) { | ||
addPass(createLoadStoreVectorizerPass()); | ||
// LSV pass opens up more opportunities for packed integer combining. | ||
addPass(createPackedIntegerCombinePass()); | ||
Comment on lines
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Can you add a phase ordering test for this? |
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} | ||
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// LowerSwitch pass may introduce unreachable blocks that can | ||
// cause unexpected behavior for subsequent passes. Placing it | ||
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@@ -2101,8 +2105,11 @@ void AMDGPUCodeGenPassBuilder::addCodeGenPrepare(AddIRPass &addPass) const { | |
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Base::addCodeGenPrepare(addPass); | ||
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if (isPassEnabled(EnableLoadStoreVectorizer)) | ||
if (isPassEnabled(EnableLoadStoreVectorizer)) { | ||
addPass(LoadStoreVectorizerPass()); | ||
// LSV pass opens up more opportunities for packed integer combining. | ||
addPass(PackedIntegerCombinePass()); | ||
} | ||
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// LowerSwitch pass may introduce unreachable blocks that can cause unexpected | ||
// behavior for subsequent passes. Placing it here seems better that these | ||
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