@@ -8,11 +8,7 @@ declare void @use.i64i1({i64, i1} %x)
8
8
define i1 @umul_greater_than_or_overflow_const (i64 %in ) {
9
9
; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const(
10
10
; CHECK-SAME: i64 [[IN:%.*]]) {
11
- ; CHECK-NEXT: [[TMP2:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 168)
12
- ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0
13
- ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1
14
- ; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], -16
15
- ; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]]
11
+ ; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i64 [[IN]], 109802048057794950
16
12
; CHECK-NEXT: ret i1 [[TMP6]]
17
13
;
18
14
%mwo = call { i64 , i1 } @llvm.umul.with.overflow.i64 (i64 %in , i64 168 )
@@ -26,11 +22,7 @@ define i1 @umul_greater_than_or_overflow_const(i64 %in) {
26
22
define i1 @umul_greater_than_or_overflow_const_i8 (i8 %in ) {
27
23
; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_i8(
28
24
; CHECK-SAME: i8 [[IN:%.*]]) {
29
- ; CHECK-NEXT: [[TMP2:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[IN]], i8 24)
30
- ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i8, i1 } [[TMP2]], 0
31
- ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i8, i1 } [[TMP2]], 1
32
- ; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i8 [[TMP3]], -16
33
- ; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]]
25
+ ; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i8 [[IN]], 10
34
26
; CHECK-NEXT: ret i1 [[TMP6]]
35
27
;
36
28
%mwo = call { i8 , i1 } @llvm.umul.with.overflow.i8 (i8 %in , i8 24 )
@@ -44,11 +36,7 @@ define i1 @umul_greater_than_or_overflow_const_i8(i8 %in) {
44
36
define i1 @umul_greater_than_or_overflow_const_commuted (i64 %in ) {
45
37
; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_commuted(
46
38
; CHECK-SAME: i64 [[IN:%.*]]) {
47
- ; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48)
48
- ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0
49
- ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1
50
- ; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800
51
- ; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP5]], [[TMP4]]
39
+ ; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i64 [[IN]], 192153584101141162
52
40
; CHECK-NEXT: ret i1 [[TMP6]]
53
41
;
54
42
%mwo = tail call { i64 , i1 } @llvm.umul.with.overflow.i64 (i64 %in , i64 48 )
@@ -62,11 +50,7 @@ define i1 @umul_greater_than_or_overflow_const_commuted(i64 %in) {
62
50
define i1 @umul_greater_than_or_overflow_const_disjoint (i64 %in ) {
63
51
; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_disjoint(
64
52
; CHECK-SAME: i64 [[IN:%.*]]) {
65
- ; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 40)
66
- ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0
67
- ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1
68
- ; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800
69
- ; CHECK-NEXT: [[TMP6:%.*]] = or disjoint i1 [[TMP4]], [[TMP5]]
53
+ ; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt i64 [[IN]], 230584300921369395
70
54
; CHECK-NEXT: ret i1 [[TMP6]]
71
55
;
72
56
%mwo = tail call { i64 , i1 } @llvm.umul.with.overflow.i64 (i64 %in , i64 40 )
@@ -80,11 +64,7 @@ define i1 @umul_greater_than_or_overflow_const_disjoint(i64 %in) {
80
64
define <2 x i1 > @umul_greater_than_or_overflow_const_vector_splat (<2 x i64 > %in ) {
81
65
; CHECK-LABEL: define <2 x i1> @umul_greater_than_or_overflow_const_vector_splat(
82
66
; CHECK-SAME: <2 x i64> [[IN:%.*]]) {
83
- ; CHECK-NEXT: [[TMP2:%.*]] = tail call { <2 x i64>, <2 x i1> } @llvm.umul.with.overflow.v2i64(<2 x i64> [[IN]], <2 x i64> splat (i64 1424))
84
- ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <2 x i64>, <2 x i1> } [[TMP2]], 0
85
- ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { <2 x i64>, <2 x i1> } [[TMP2]], 1
86
- ; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt <2 x i64> [[TMP3]], splat (i64 9223372036854775800)
87
- ; CHECK-NEXT: [[TMP6:%.*]] = or <2 x i1> [[TMP4]], [[TMP5]]
67
+ ; CHECK-NEXT: [[TMP6:%.*]] = icmp ugt <2 x i64> [[IN]], splat (i64 6477087104532848)
88
68
; CHECK-NEXT: ret <2 x i1> [[TMP6]]
89
69
;
90
70
%mwo = tail call { <2 x i64 >, <2 x i1 > } @llvm.umul.with.overflow.v2i64 (<2 x i64 > %in , <2 x i64 > <i64 1424 , i64 1424 >)
@@ -98,11 +78,7 @@ define <2 x i1> @umul_greater_than_or_overflow_const_vector_splat(<2 x i64> %in)
98
78
define <4 x i1 > @umul_greater_than_or_overflow_const_vector_non_splat (<4 x i64 > %in ) {
99
79
; CHECK-LABEL: define <4 x i1> @umul_greater_than_or_overflow_const_vector_non_splat(
100
80
; CHECK-SAME: <4 x i64> [[IN:%.*]]) {
101
- ; CHECK-NEXT: [[MWO:%.*]] = tail call { <4 x i64>, <4 x i1> } @llvm.umul.with.overflow.v4i64(<4 x i64> [[IN]], <4 x i64> <i64 24, i64 1424, i64 0, i64 -1>)
102
- ; CHECK-NEXT: [[MUL:%.*]] = extractvalue { <4 x i64>, <4 x i1> } [[MWO]], 0
103
- ; CHECK-NEXT: [[OVF:%.*]] = extractvalue { <4 x i64>, <4 x i1> } [[MWO]], 1
104
- ; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <4 x i64> [[MUL]], <i64 9223372036854775000, i64 9223372036854775800, i64 -16, i64 -16>
105
- ; CHECK-NEXT: [[RET:%.*]] = or <4 x i1> [[OVF]], [[CMP]]
81
+ ; CHECK-NEXT: [[RET:%.*]] = icmp ugt <4 x i64> [[IN]], <i64 384307168202282291, i64 6477087104532848, i64 -1, i64 0>
106
82
; CHECK-NEXT: ret <4 x i1> [[RET]]
107
83
;
108
84
%mwo = tail call { <4 x i64 >, <4 x i1 > } @llvm.umul.with.overflow.v2i64 (<4 x i64 > %in , <4 x i64 > <i64 24 , i64 1424 , i64 0 , i64 -1 >)
0 commit comments