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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -S -passes=instcombine < %s | FileCheck %s |
| 3 | + |
| 4 | +declare void @use.i1(i1 %x) |
| 5 | +declare void @use.i64(i64 %x) |
| 6 | +declare void @use.i64i1({i64, i1} %x) |
| 7 | + |
| 8 | +define i1 @umul_greater_than_or_overflow_const(i64 %in) { |
| 9 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const( |
| 10 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 11 | +; CHECK-NEXT: [[TMP2:%.*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 168) |
| 12 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 13 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 14 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], -16 |
| 15 | +; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]] |
| 16 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 17 | +; |
| 18 | + %mwo = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 168) |
| 19 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 20 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 21 | + %cmp = icmp ugt i64 %mul, -16 |
| 22 | + %ret = or i1 %ovf, %cmp |
| 23 | + ret i1 %ret |
| 24 | +} |
| 25 | + |
| 26 | +define i1 @umul_greater_than_or_overflow_const_i8(i8 %in) { |
| 27 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_i8( |
| 28 | +; CHECK-SAME: i8 [[IN:%.*]]) { |
| 29 | +; CHECK-NEXT: [[TMP2:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[IN]], i8 24) |
| 30 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i8, i1 } [[TMP2]], 0 |
| 31 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i8, i1 } [[TMP2]], 1 |
| 32 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i8 [[TMP3]], -16 |
| 33 | +; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]] |
| 34 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 35 | +; |
| 36 | + %mwo = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %in, i8 24) |
| 37 | + %mul = extractvalue { i8, i1 } %mwo, 0 |
| 38 | + %ovf = extractvalue { i8, i1 } %mwo, 1 |
| 39 | + %cmp = icmp ugt i8 %mul, -16 |
| 40 | + %ret = or i1 %ovf, %cmp |
| 41 | + ret i1 %ret |
| 42 | +} |
| 43 | + |
| 44 | +define i1 @umul_greater_than_or_overflow_const_commuted(i64 %in) { |
| 45 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_commuted( |
| 46 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 47 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48) |
| 48 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 49 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 50 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800 |
| 51 | +; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP5]], [[TMP4]] |
| 52 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 53 | +; |
| 54 | + %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 48) |
| 55 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 56 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 57 | + %cmp = icmp ugt i64 %mul, 9223372036854775800 |
| 58 | + %ret = or i1 %cmp, %ovf |
| 59 | + ret i1 %ret |
| 60 | +} |
| 61 | + |
| 62 | +define i1 @umul_greater_than_or_overflow_const_disjoint(i64 %in) { |
| 63 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_disjoint( |
| 64 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 65 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 40) |
| 66 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 67 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 68 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800 |
| 69 | +; CHECK-NEXT: [[TMP6:%.*]] = or disjoint i1 [[TMP4]], [[TMP5]] |
| 70 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 71 | +; |
| 72 | + %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 40) |
| 73 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 74 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 75 | + %cmp = icmp ugt i64 %mul, 9223372036854775800 |
| 76 | + %ret = or disjoint i1 %ovf, %cmp |
| 77 | + ret i1 %ret |
| 78 | +} |
| 79 | + |
| 80 | +define <2 x i1> @umul_greater_than_or_overflow_const_vector_splat(<2 x i64> %in) { |
| 81 | +; CHECK-LABEL: define <2 x i1> @umul_greater_than_or_overflow_const_vector_splat( |
| 82 | +; CHECK-SAME: <2 x i64> [[IN:%.*]]) { |
| 83 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { <2 x i64>, <2 x i1> } @llvm.umul.with.overflow.v2i64(<2 x i64> [[IN]], <2 x i64> splat (i64 1424)) |
| 84 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <2 x i64>, <2 x i1> } [[TMP2]], 0 |
| 85 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { <2 x i64>, <2 x i1> } [[TMP2]], 1 |
| 86 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt <2 x i64> [[TMP3]], splat (i64 9223372036854775800) |
| 87 | +; CHECK-NEXT: [[TMP6:%.*]] = or <2 x i1> [[TMP4]], [[TMP5]] |
| 88 | +; CHECK-NEXT: ret <2 x i1> [[TMP6]] |
| 89 | +; |
| 90 | + %mwo = tail call { <2 x i64>, <2 x i1> } @llvm.umul.with.overflow.v2i64(<2 x i64> %in, <2 x i64> <i64 1424, i64 1424>) |
| 91 | + %mul = extractvalue { <2 x i64>, <2 x i1> } %mwo, 0 |
| 92 | + %ovf = extractvalue { <2 x i64>, <2 x i1> } %mwo, 1 |
| 93 | + %cmp = icmp ugt <2 x i64> %mul, <i64 9223372036854775800, i64 9223372036854775800> |
| 94 | + %ret = or <2 x i1> %ovf, %cmp |
| 95 | + ret <2 x i1> %ret |
| 96 | +} |
| 97 | + |
| 98 | +define <4 x i1> @umul_greater_than_or_overflow_const_vector_non_splat(<4 x i64> %in) { |
| 99 | +; CHECK-LABEL: define <4 x i1> @umul_greater_than_or_overflow_const_vector_non_splat( |
| 100 | +; CHECK-SAME: <4 x i64> [[IN:%.*]]) { |
| 101 | +; CHECK-NEXT: [[MWO:%.*]] = tail call { <4 x i64>, <4 x i1> } @llvm.umul.with.overflow.v4i64(<4 x i64> [[IN]], <4 x i64> <i64 24, i64 1424, i64 0, i64 -1>) |
| 102 | +; CHECK-NEXT: [[MUL:%.*]] = extractvalue { <4 x i64>, <4 x i1> } [[MWO]], 0 |
| 103 | +; CHECK-NEXT: [[OVF:%.*]] = extractvalue { <4 x i64>, <4 x i1> } [[MWO]], 1 |
| 104 | +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <4 x i64> [[MUL]], <i64 9223372036854775000, i64 9223372036854775800, i64 -16, i64 -16> |
| 105 | +; CHECK-NEXT: [[RET:%.*]] = or <4 x i1> [[OVF]], [[CMP]] |
| 106 | +; CHECK-NEXT: ret <4 x i1> [[RET]] |
| 107 | +; |
| 108 | + %mwo = tail call { <4 x i64>, <4 x i1> } @llvm.umul.with.overflow.v2i64(<4 x i64> %in, <4 x i64> <i64 24, i64 1424, i64 0, i64 -1>) |
| 109 | + %mul = extractvalue { <4 x i64>, <4 x i1> } %mwo, 0 |
| 110 | + %ovf = extractvalue { <4 x i64>, <4 x i1> } %mwo, 1 |
| 111 | + %cmp = icmp ugt <4 x i64> %mul, <i64 9223372036854775000, i64 9223372036854775800, i64 -16, i64 -16> |
| 112 | + %ret = or <4 x i1> %ovf, %cmp |
| 113 | + ret <4 x i1> %ret |
| 114 | +} |
| 115 | + |
| 116 | +; Negative test |
| 117 | +define i1 @umul_greater_than_and_overflow_const_negative(i64 %in) { |
| 118 | +; CHECK-LABEL: define i1 @umul_greater_than_and_overflow_const_negative( |
| 119 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 120 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48) |
| 121 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 122 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 123 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i64 [[TMP3]], 9223372036854775800 |
| 124 | +; CHECK-NEXT: [[TMP6:%.*]] = and i1 [[TMP4]], [[TMP5]] |
| 125 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 126 | +; |
| 127 | + %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 48) |
| 128 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 129 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 130 | + %cmp = icmp ult i64 %mul, 9223372036854775800 |
| 131 | + %ret = and i1 %ovf, %cmp |
| 132 | + ret i1 %ret |
| 133 | +} |
| 134 | + |
| 135 | +; Negative test |
| 136 | +define i1 @umul_less_than_or_overflow_const_negative(i64 %in) { |
| 137 | +; CHECK-LABEL: define i1 @umul_less_than_or_overflow_const_negative( |
| 138 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 139 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48) |
| 140 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 141 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 142 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i64 [[TMP3]], 9223372036854775800 |
| 143 | +; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]] |
| 144 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 145 | +; |
| 146 | + %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 48) |
| 147 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 148 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 149 | + %cmp = icmp ult i64 %mul, 9223372036854775800 |
| 150 | + %ret = or i1 %ovf, %cmp |
| 151 | + ret i1 %ret |
| 152 | +} |
| 153 | + |
| 154 | +; Negative test |
| 155 | +define i1 @umul_greater_than_or_overflow_const_multiuse_add_negative(i64 %in) { |
| 156 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_multiuse_add_negative( |
| 157 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 158 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48) |
| 159 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 160 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 161 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800 |
| 162 | +; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]] |
| 163 | +; CHECK-NEXT: tail call void @use.i64(i64 [[TMP3]]) |
| 164 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 165 | +; |
| 166 | + %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 48) |
| 167 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 168 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 169 | + %cmp = icmp ugt i64 %mul, 9223372036854775800 |
| 170 | + %ret = or i1 %ovf, %cmp |
| 171 | + tail call void @use.i64(i64 %mul) |
| 172 | + ret i1 %ret |
| 173 | +} |
| 174 | + |
| 175 | +; Negative test |
| 176 | +define i1 @umul_greater_than_or_overflow_const_multiuse_overflow_negative(i64 %in) { |
| 177 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_multiuse_overflow_negative( |
| 178 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 179 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48) |
| 180 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 181 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 182 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800 |
| 183 | +; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]] |
| 184 | +; CHECK-NEXT: tail call void @use.i1(i1 [[TMP4]]) |
| 185 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 186 | +; |
| 187 | + %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 48) |
| 188 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 189 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 190 | + %cmp = icmp ugt i64 %mul, 9223372036854775800 |
| 191 | + %ret = or i1 %ovf, %cmp |
| 192 | + tail call void @use.i1(i1 %ovf) |
| 193 | + ret i1 %ret |
| 194 | +} |
| 195 | + |
| 196 | +; Negative test |
| 197 | +define i1 @umul_greater_than_or_overflow_const_multiuse_icmp_negative(i64 %in) { |
| 198 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_multiuse_icmp_negative( |
| 199 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 200 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48) |
| 201 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 202 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 203 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800 |
| 204 | +; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]] |
| 205 | +; CHECK-NEXT: tail call void @use.i1(i1 [[TMP5]]) |
| 206 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 207 | +; |
| 208 | + %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 48) |
| 209 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 210 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 211 | + %cmp = icmp ugt i64 %mul, 9223372036854775800 |
| 212 | + %ret = or i1 %ovf, %cmp |
| 213 | + tail call void @use.i1(i1 %cmp) |
| 214 | + ret i1 %ret |
| 215 | +} |
| 216 | + |
| 217 | +; Negative test |
| 218 | +define i1 @umul_greater_than_or_overflow_const_multiuse_umul_call_negative(i64 %in) { |
| 219 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_multiuse_umul_call_negative( |
| 220 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 221 | +; CHECK-NEXT: [[TMP2:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[IN]], i64 48) |
| 222 | +; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 |
| 223 | +; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 |
| 224 | +; CHECK-NEXT: [[TMP5:%.*]] = icmp ugt i64 [[TMP3]], 9223372036854775800 |
| 225 | +; CHECK-NEXT: [[TMP6:%.*]] = or i1 [[TMP4]], [[TMP5]] |
| 226 | +; CHECK-NEXT: tail call void @use.i64i1({ i64, i1 } [[TMP2]]) |
| 227 | +; CHECK-NEXT: ret i1 [[TMP6]] |
| 228 | +; |
| 229 | + %mwo = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 48) |
| 230 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 231 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 232 | + %cmp = icmp ugt i64 %mul, 9223372036854775800 |
| 233 | + %ret = or i1 %ovf, %cmp |
| 234 | + tail call void @use.i64i1({ i64, i1 } %mwo) |
| 235 | + ret i1 %ret |
| 236 | +} |
| 237 | + |
| 238 | +; Negative test. The umul.with.overflow should be folded away before. |
| 239 | +define i1 @umul_greater_than_or_overflow_const_0_negative(i64 %in) { |
| 240 | +; CHECK-LABEL: define i1 @umul_greater_than_or_overflow_const_0_negative( |
| 241 | +; CHECK-SAME: i64 [[IN:%.*]]) { |
| 242 | +; CHECK-NEXT: ret i1 false |
| 243 | +; |
| 244 | + %mwo = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %in, i64 0) |
| 245 | + %mul = extractvalue { i64, i1 } %mwo, 0 |
| 246 | + %ovf = extractvalue { i64, i1 } %mwo, 1 |
| 247 | + %cmp = icmp ugt i64 %mul, 0 |
| 248 | + %ret = or i1 %ovf, %cmp |
| 249 | + ret i1 %ret |
| 250 | +} |
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