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[Mips] ISel zext nneg the same as sext for Mips64. (#102852)
Fixes #62587.
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3 files changed

+32
-32
lines changed

3 files changed

+32
-32
lines changed

llvm/include/llvm/Target/TargetSelectionDAG.td

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1079,6 +1079,13 @@ def zanyext : PatFrags<(ops node:$op),
10791079
[(zext node:$op),
10801080
(anyext node:$op)]>;
10811081

1082+
def zext_nneg : PatFrag<(ops node:$src), (zext node:$src), [{
1083+
return N->getFlags().hasNonNeg();
1084+
}]>;
1085+
def sext_like : PatFrags<(ops node:$src),
1086+
[(zext_nneg node:$src),
1087+
(sext node:$src)]>;
1088+
10821089
// null_frag - The null pattern operator is used in multiclass instantiations
10831090
// which accept an SDPatternOperator for use in matching patterns for internal
10841091
// definitions. When expanding a pattern, if the null fragment is referenced

llvm/lib/Target/Mips/Mips64InstrInfo.td

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -843,7 +843,7 @@ def : MipsPat<(i64 (anyext GPR32:$src)),
843843
ISA_MIPS3, GPR_64;
844844
def : MipsPat<(i64 (zext GPR32:$src)), (DSRL (DSLL64_32 GPR32:$src), 32)>,
845845
ISA_MIPS3, GPR_64;
846-
def : MipsPat<(i64 (sext GPR32:$src)), (SLL64_32 GPR32:$src)>, ISA_MIPS3,
846+
def : MipsPat<(i64 (sext_like GPR32:$src)), (SLL64_32 GPR32:$src)>, ISA_MIPS3,
847847
GPR_64;
848848

849849
let AdditionalPredicates = [NotInMicroMips] in {
@@ -911,40 +911,40 @@ def : MipsPat<(atomic_store_64 GPR64:$v, addr:$a), (SD GPR64:$v, addr:$a)>,
911911

912912
// Patterns used for matching away redundant sign extensions.
913913
// MIPS32 arithmetic instructions sign extend their result implicitly.
914-
def : MipsPat<(i64 (sext (i32 (add GPR32:$src, immSExt16:$imm16)))),
914+
def : MipsPat<(i64 (sext_like (i32 (add GPR32:$src, immSExt16:$imm16)))),
915915
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
916916
(ADDiu GPR32:$src, immSExt16:$imm16), sub_32)>;
917-
def : MipsPat<(i64 (sext (i32 (add GPR32:$src, GPR32:$src2)))),
917+
def : MipsPat<(i64 (sext_like (i32 (add GPR32:$src, GPR32:$src2)))),
918918
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
919919
(ADDu GPR32:$src, GPR32:$src2), sub_32)>;
920-
def : MipsPat<(i64 (sext (i32 (sub GPR32:$src, GPR32:$src2)))),
920+
def : MipsPat<(i64 (sext_like (i32 (sub GPR32:$src, GPR32:$src2)))),
921921
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
922922
(SUBu GPR32:$src, GPR32:$src2), sub_32)>;
923-
def : MipsPat<(i64 (sext (i32 (mul GPR32:$src, GPR32:$src2)))),
923+
def : MipsPat<(i64 (sext_like (i32 (mul GPR32:$src, GPR32:$src2)))),
924924
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
925925
(MUL GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS32_NOT_32R6_64R6;
926-
def : MipsPat<(i64 (sext (i32 (MipsMFHI ACC64:$src)))),
926+
def : MipsPat<(i64 (sext_like (i32 (MipsMFHI ACC64:$src)))),
927927
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
928928
(PseudoMFHI ACC64:$src), sub_32)>;
929-
def : MipsPat<(i64 (sext (i32 (MipsMFLO ACC64:$src)))),
929+
def : MipsPat<(i64 (sext_like (i32 (MipsMFLO ACC64:$src)))),
930930
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
931931
(PseudoMFLO ACC64:$src), sub_32)>;
932-
def : MipsPat<(i64 (sext (i32 (shl GPR32:$src, immZExt5:$imm5)))),
932+
def : MipsPat<(i64 (sext_like (i32 (shl GPR32:$src, immZExt5:$imm5)))),
933933
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
934934
(SLL GPR32:$src, immZExt5:$imm5), sub_32)>;
935-
def : MipsPat<(i64 (sext (i32 (shl GPR32:$src, GPR32:$src2)))),
935+
def : MipsPat<(i64 (sext_like (i32 (shl GPR32:$src, GPR32:$src2)))),
936936
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
937937
(SLLV GPR32:$src, GPR32:$src2), sub_32)>;
938-
def : MipsPat<(i64 (sext (i32 (srl GPR32:$src, immZExt5:$imm5)))),
938+
def : MipsPat<(i64 (sext_like (i32 (srl GPR32:$src, immZExt5:$imm5)))),
939939
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
940940
(SRL GPR32:$src, immZExt5:$imm5), sub_32)>;
941-
def : MipsPat<(i64 (sext (i32 (srl GPR32:$src, GPR32:$src2)))),
941+
def : MipsPat<(i64 (sext_like (i32 (srl GPR32:$src, GPR32:$src2)))),
942942
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
943943
(SRLV GPR32:$src, GPR32:$src2), sub_32)>;
944-
def : MipsPat<(i64 (sext (i32 (sra GPR32:$src, immZExt5:$imm5)))),
944+
def : MipsPat<(i64 (sext_like (i32 (sra GPR32:$src, immZExt5:$imm5)))),
945945
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
946946
(SRA GPR32:$src, immZExt5:$imm5), sub_32)>;
947-
def : MipsPat<(i64 (sext (i32 (sra GPR32:$src, GPR32:$src2)))),
947+
def : MipsPat<(i64 (sext_like (i32 (sra GPR32:$src, GPR32:$src2)))),
948948
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
949949
(SRAV GPR32:$src, GPR32:$src2), sub_32)>;
950950

llvm/test/CodeGen/Mips/bittest.ll

Lines changed: 12 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -53,23 +53,22 @@ define signext i32 @bittest_10_i32(i32 signext %a) nounwind {
5353
; MIPS64: # %bb.0:
5454
; MIPS64-NEXT: andi $1, $4, 1024
5555
; MIPS64-NEXT: sltiu $1, $1, 1
56-
; MIPS64-NEXT: dsll $1, $1, 32
5756
; MIPS64-NEXT: jr $ra
58-
; MIPS64-NEXT: dsrl $2, $1, 32
57+
; MIPS64-NEXT: sll $2, $1, 0
5958
;
6059
; MIPS64R2-LABEL: bittest_10_i32:
6160
; MIPS64R2: # %bb.0:
6261
; MIPS64R2-NEXT: andi $1, $4, 1024
6362
; MIPS64R2-NEXT: sltiu $1, $1, 1
6463
; MIPS64R2-NEXT: jr $ra
65-
; MIPS64R2-NEXT: dext $2, $1, 0, 32
64+
; MIPS64R2-NEXT: sll $2, $1, 0
6665
;
6766
; MIPS64R6-LABEL: bittest_10_i32:
6867
; MIPS64R6: # %bb.0:
6968
; MIPS64R6-NEXT: andi $1, $4, 1024
7069
; MIPS64R6-NEXT: sltiu $1, $1, 1
7170
; MIPS64R6-NEXT: jr $ra
72-
; MIPS64R6-NEXT: dext $2, $1, 0, 32
71+
; MIPS64R6-NEXT: sll $2, $1, 0
7372
;
7473
; MM32R3-LABEL: bittest_10_i32:
7574
; MM32R3: # %bb.0:
@@ -111,23 +110,22 @@ define signext i32 @bittest_15_i32(i32 signext %a) nounwind {
111110
; MIPS64: # %bb.0:
112111
; MIPS64-NEXT: andi $1, $4, 32768
113112
; MIPS64-NEXT: sltiu $1, $1, 1
114-
; MIPS64-NEXT: dsll $1, $1, 32
115113
; MIPS64-NEXT: jr $ra
116-
; MIPS64-NEXT: dsrl $2, $1, 32
114+
; MIPS64-NEXT: sll $2, $1, 0
117115
;
118116
; MIPS64R2-LABEL: bittest_15_i32:
119117
; MIPS64R2: # %bb.0:
120118
; MIPS64R2-NEXT: andi $1, $4, 32768
121119
; MIPS64R2-NEXT: sltiu $1, $1, 1
122120
; MIPS64R2-NEXT: jr $ra
123-
; MIPS64R2-NEXT: dext $2, $1, 0, 32
121+
; MIPS64R2-NEXT: sll $2, $1, 0
124122
;
125123
; MIPS64R6-LABEL: bittest_15_i32:
126124
; MIPS64R6: # %bb.0:
127125
; MIPS64R6-NEXT: andi $1, $4, 32768
128126
; MIPS64R6-NEXT: sltiu $1, $1, 1
129127
; MIPS64R6-NEXT: jr $ra
130-
; MIPS64R6-NEXT: dext $2, $1, 0, 32
128+
; MIPS64R6-NEXT: sll $2, $1, 0
131129
;
132130
; MM32R3-LABEL: bittest_15_i32:
133131
; MM32R3: # %bb.0:
@@ -171,23 +169,22 @@ define signext i32 @bittest_16_i32(i32 signext %a) nounwind {
171169
; MIPS64-NEXT: not $1, $4
172170
; MIPS64-NEXT: srl $1, $1, 16
173171
; MIPS64-NEXT: andi $1, $1, 1
174-
; MIPS64-NEXT: dsll $1, $1, 32
175172
; MIPS64-NEXT: jr $ra
176-
; MIPS64-NEXT: dsrl $2, $1, 32
173+
; MIPS64-NEXT: sll $2, $1, 0
177174
;
178175
; MIPS64R2-LABEL: bittest_16_i32:
179176
; MIPS64R2: # %bb.0:
180177
; MIPS64R2-NEXT: not $1, $4
181178
; MIPS64R2-NEXT: ext $1, $1, 16, 1
182179
; MIPS64R2-NEXT: jr $ra
183-
; MIPS64R2-NEXT: dext $2, $1, 0, 32
180+
; MIPS64R2-NEXT: sll $2, $1, 0
184181
;
185182
; MIPS64R6-LABEL: bittest_16_i32:
186183
; MIPS64R6: # %bb.0:
187184
; MIPS64R6-NEXT: not $1, $4
188185
; MIPS64R6-NEXT: ext $1, $1, 16, 1
189186
; MIPS64R6-NEXT: jr $ra
190-
; MIPS64R6-NEXT: dext $2, $1, 0, 32
187+
; MIPS64R6-NEXT: sll $2, $1, 0
191188
;
192189
; MM32R3-LABEL: bittest_16_i32:
193190
; MM32R3: # %bb.0:
@@ -228,24 +225,20 @@ define signext i32 @bittest_31_i32(i32 signext %a) nounwind {
228225
; MIPS64-LABEL: bittest_31_i32:
229226
; MIPS64: # %bb.0:
230227
; MIPS64-NEXT: not $1, $4
231-
; MIPS64-NEXT: srl $1, $1, 31
232-
; MIPS64-NEXT: dsll $1, $1, 32
233228
; MIPS64-NEXT: jr $ra
234-
; MIPS64-NEXT: dsrl $2, $1, 32
229+
; MIPS64-NEXT: srl $2, $1, 31
235230
;
236231
; MIPS64R2-LABEL: bittest_31_i32:
237232
; MIPS64R2: # %bb.0:
238233
; MIPS64R2-NEXT: not $1, $4
239-
; MIPS64R2-NEXT: srl $1, $1, 31
240234
; MIPS64R2-NEXT: jr $ra
241-
; MIPS64R2-NEXT: dext $2, $1, 0, 32
235+
; MIPS64R2-NEXT: srl $2, $1, 31
242236
;
243237
; MIPS64R6-LABEL: bittest_31_i32:
244238
; MIPS64R6: # %bb.0:
245239
; MIPS64R6-NEXT: not $1, $4
246-
; MIPS64R6-NEXT: srl $1, $1, 31
247240
; MIPS64R6-NEXT: jr $ra
248-
; MIPS64R6-NEXT: dext $2, $1, 0, 32
241+
; MIPS64R6-NEXT: srl $2, $1, 31
249242
;
250243
; MM32R3-LABEL: bittest_31_i32:
251244
; MM32R3: # %bb.0:

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