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Update ARMISelLowering.cpp
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llvm/lib/Target/ARM/ARMISelLowering.cpp

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -4840,25 +4840,24 @@ static bool isFloatingPointZero(SDValue Op) {
48404840
}
48414841

48424842
static bool shouldBeAdjustedToZero(SDValue LHS, APInt C, ISD::CondCode &CC) {
4843-
// TODO: Can we know ahead of time if we can use a MOVS?
4843+
4844+
// setlt and setge are changed to MI and PL for zero respectively, so it is
4845+
// safe.
4846+
if (C.isAllOnes() && (CC == ISD::SETLE || CC == ISD::SETGT)) {
4847+
CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE;
4848+
return true;
4849+
}
4850+
4851+
// On ARM, adds and subs set the V flags correctly, which means the optimizer
4852+
// can condense to a single adds/subs
48444853
switch (LHS.getOpcode()) {
4845-
case ISD::AND:
4846-
case ISD::OR:
4847-
case ISD::XOR:
48484854
case ISD::ADD:
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case ISD::SUB:
4850-
case ISD::MUL:
4851-
// In ARM, almost every instruction has a variant that sets flags.
48524856
break;
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default:
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return false;
48554859
}
48564860

4857-
if (C.isAllOnes() && (CC == ISD::SETLE || CC == ISD::SETGT)) {
4858-
CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE;
4859-
return true;
4860-
}
4861-
48624861
if (C.isOne() && (CC == ISD::SETLT || CC == ISD::SETGE)) {
48634862
CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT;
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return true;

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