[hw] Add container op #8704
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[hw] Add container op #8704
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Add a new `hw.container` op. This is intended to be a generic container of hardware. Critically, this exists to enable the checking of ops that are users of inner symbol tables. This is shown with the one error test case that shows validation of a `hw.hierpath` op with an invalid inner symbol use. (This will not be checked if a `builtin.module` is used.) Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
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For temporary migration, are you going to change ExportVerilog etc to allow both container op and builtin.module? In that case we will need to either make passes op-agnostic or tweak |
I had thought that something like this could work, but didn't know the particulars of how to do it. That said, Will did almost a full migration a while ago (main...dtzSiFive:circt:feature/hw-design-op) and that touched a lot of files, but wasn't conceptually that big of a diff. So, maybe we just get consensus and then do a hard switch? |
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Add a new
hw.containerop. This is intended to be a generic containerof hardware. Critically, this exists to enable the checking of ops that
are users of inner symbol tables. This is shown with the one error test
case that shows validation of a
hw.hierpathop with an invalid innersymbol use. (This will not be checked if a
builtin.moduleis used.)Note: this is intended to be temporarily backwards-compatible with existing operations. This is done by allowing
hw.moduleand friends to have a parent that is either abuiltin.moduleor ahw.container. As long as there is buy-in on this approach, I will then go about updating all tests, migrating things over, and requiring thathw.moduleand friends have ahw.containerparent.