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*Stalled* MSI PRO Z790-P (DDR5) - coreboot 25.03 #1962

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Tonux599
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@Tonux599 Tonux599 commented Apr 24, 2025

3mdeb upstreamed their work on the MSI boards to coreboot master, and seems to be up-to-date with coreboot 25.03.

This PR builds heads for MSI PRO Z790-P (DDR5) based on coreboot 25.03. We're avoiding dasharo-blobs by fetching MSI's BIOS and extracting the relevant blobs.

I don't actually own this board yet, I'm expecting it in about 2 weeks.

This build does not use HOTP and USB keyboard. I don't own the other MSI variants, so they won't be part of this PR.

There's a fair few cherry-picked commits based on 3mdebs own work on their Heads branch. @miczyg1 and @mkopec let me know if you are happy with how I've picked/implemented these.

TODO List (more will be added as I think of them, and please comment any additions):

This PR will remain draft until the above TODO list is complete and CI passes.

My thanks to those at 3mdeb for their work supporting this board in coreboot, and their work on their heads branch.

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miczyg1 commented Apr 24, 2025

let me know if you are happy with how I've picked/implemented these.

LGTM.

Verify it can be flashed using MSI's "FlashBIOS" button thing.

It won't work with upstream coreboot.

miczyg1 and others added 19 commits April 24, 2025 14:14
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
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Verify it can be flashed using MSI's "FlashBIOS" button thing.

It won't work with upstream coreboot.

Thanks. Should we expect internal flashing (when adding PGP keys for example) to work then?

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miczyg1 commented Apr 24, 2025

Verify it can be flashed using MSI's "FlashBIOS" button thing.

It won't work with upstream coreboot.

Thanks. Should we expect internal flashing (when adding PGP keys for example) to work then?

By default the Z790-P board came with the descriptor locked, so IFD and ME regions are read-only when flashing internally. Should be fine with flashing just the BIOS region, but otherwise it won't (e.g. if HAP bit is desired)

Signed-off-by: Thomas Clarke <tonux@riseup.net>
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@miczyg1 it seems that Dasharo/coreboot#404 was not upstreamed to coreboot. Is that correct? I can create a patch to be applied here based on that PR, but could avoid using patches if it was included in a future release of coreboot.

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miczyg1 commented Apr 25, 2025

@miczyg1 it seems that Dasharo/coreboot#404 was not upstreamed to coreboot. Is that correct? I can create a patch to be applied here based on that PR, but could avoid using patches if it was included in a future release of coreboot.

Yes, it wasn't. Same with Dasharo/coreboot#357 (and many others)... I had no time to upstream it.

These patches will be large.

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@miczyg1 it seems that Dasharo/coreboot#404 was not upstreamed to coreboot. Is that correct? I can create a patch to be applied here based on that PR, but could avoid using patches if it was included in a future release of coreboot.

Yes, it wasn't. Same with Dasharo/coreboot#357 (and many others)... I had no time to upstream it.

These patches will be large.

Dasharo/coreboot#404 seems to patch cleanly. I'm less bothered about Dasharo/coreboot#357 unless it affects the internal updating of heads.

@miczyg1 I'm not as familiar as you with submitting coreboot patches, but I would be happy to spend time upstreaming your work, if I'm allowed to even though I'm not the author. Otherwise, if there is anything else I can do to support you to upstream don't hesitate to contact me.

Signed-off-by: Thomas Clarke <tonux@riseup.net>
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miczyg1 commented Apr 28, 2025

@miczyg1 I'm not as familiar as you with submitting coreboot patches, but I would be happy to spend time upstreaming your work, if I'm allowed to even though I'm not the author. Otherwise, if there is anything else I can do to support you to upstream don't hesitate to contact me.

coreboot gerrit review system can distinguish a patch author from patch uploader. As long as you preserve the commit metadata, everything should be allright. I could upload the fan control patches so that I can be the owner of the patch series (it allows me to control it, like set WIP, etc.).

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miczyg1 commented Apr 28, 2025

Pushed the patches for fan control @Tonux599 :

https://review.coreboot.org/c/coreboot/+/87476
https://review.coreboot.org/c/coreboot/+/87477
https://review.coreboot.org/c/coreboot/+/87478

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Tonux599 and others added 2 commits May 5, 2025 09:56
Signed-off-by: Thomas Clarke <tonux@riseup.net>
Signed-off-by: Matthew Drobnak <matthew@drobnak.com>
Signed-off-by: Thomas Clarke <tonux@riseup.net>
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Tonux599 commented May 5, 2025

Currently testing on my board but still no TPM for now (hopefully comes sometime this week). Heads boots and internal flashing works with flashprog.

@mdrobnak I hope you don't mind that I cherry picked 41d6391.

@miczyg1 @mkopec I did cherry pick Dasharo#7 at the beginning but now presume we don't need it because we're using MSI's default layout? I'm going to revert and test but would like your input too.

Also around 20% of boots result in a kernel panic. Not sure why yet, will investigate.

Signed-off-by: Thomas Clarke <tonux@riseup.net>
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Tonux599 commented May 5, 2025

@miczyg1 I'm getting frequent kernel panics (in heads only, not when booted to Qubes) like:

mce: CPUs not responding to MCE broadcast (may include false positives): 2-3
Kernel panic - not syncing: Timeout: Not all CPUs entered broadcast exception handler

Looking around about MCE's, I came across your issue below, do you think they are related?
https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/MW44TIEMFMVDWPVCAFPE2QUFXXGZYYAX/

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Tonux599 commented May 5, 2025

@miczyg1 I'm getting frequent kernel panics (in heads only, not when booted to Qubes) like:

mce: CPUs not responding to MCE broadcast (may include false positives): 2-3
Kernel panic - not syncing: Timeout: Not all CPUs entered broadcast exception handler

Looking around about MCE's, I came across your issue below, do you think they are related? https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/MW44TIEMFMVDWPVCAFPE2QUFXXGZYYAX/

I can't reproduce this error on Dasharo's Heads v0.9.0. The kernel version is the same, so I think it's either a coreboot configuration issue, or microcode. My builds have 0x12c whilst Dasharo v0.9.0 was something much older. I'll try using an older microcode.

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Tonux599 commented May 5, 2025

@miczyg1 I'm getting frequent kernel panics (in heads only, not when booted to Qubes) like:

mce: CPUs not responding to MCE broadcast (may include false positives): 2-3
Kernel panic - not syncing: Timeout: Not all CPUs entered broadcast exception handler

Looking around about MCE's, I came across your issue below, do you think they are related? https://mail.coreboot.org/hyperkitty/list/coreboot@coreboot.org/thread/MW44TIEMFMVDWPVCAFPE2QUFXXGZYYAX/

I can't reproduce this error on Dasharo's Heads v0.9.0. The kernel version is the same, so I think it's either a coreboot configuration issue, or microcode. My builds have 0x12c whilst Dasharo v0.9.0 was something much older. I'll try using an older microcode.

Downgraded the microcode on my build to 0x119, which is what Dasharo v0.9.0 was on and panic still happening. So presumably something in either the coreboot source (anything of relevance not been upstreamed @miczyg1?) or something in the coreboot config.

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miczyg1 commented May 6, 2025

So presumably something in either the coreboot source (anything of relevance not been upstreamed @miczyg1?) or something in the coreboot config.

Not entirely impossible, but no idea what that might be.

Tonux599 added 3 commits May 6, 2025 21:44
This reverts commit abf1c35.

Signed-off-by: Thomas Clarke <tonux@riseup.net>
This reverts commit 062260c.

Signed-off-by: Thomas Clarke <tonux@riseup.net>
This reverts commit 5b77f0f.

Signed-off-by: Thomas Clarke <tonux@riseup.net>
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tlaurion commented May 13, 2025

@Tonux599
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This is stalled until the stability issue #1962 (comment) is resolved.

Until then the following is what I'm using on my Z790-P (DDR5) board. It uses Dasharo's v0.9.2 release.

https://github.com/Tonux599/heads/tree/my-custom-msi_z790p_ddr5

@Tonux599 Tonux599 changed the title MSI PRO Z790-P (DDR5) - coreboot 25.03 *Stalled* MSI PRO Z790-P (DDR5) - coreboot 25.03 May 21, 2025
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