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| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | + |
| 3 | +#include "processor.h" |
| 4 | + |
| 5 | +/* address of refill exception should be 4K aligned */ |
| 6 | +.balign 4096 |
| 7 | +.global handle_tlb_refill |
| 8 | +handle_tlb_refill: |
| 9 | + csrwr t0, LOONGARCH_CSR_TLBRSAVE |
| 10 | + csrrd t0, LOONGARCH_CSR_PGD |
| 11 | + lddir t0, t0, 3 |
| 12 | + lddir t0, t0, 1 |
| 13 | + ldpte t0, 0 |
| 14 | + ldpte t0, 1 |
| 15 | + tlbfill |
| 16 | + csrrd t0, LOONGARCH_CSR_TLBRSAVE |
| 17 | + ertn |
| 18 | + |
| 19 | + /* |
| 20 | + * save and restore all gprs except base register, |
| 21 | + * and default value of base register is sp ($r3). |
| 22 | + */ |
| 23 | +.macro save_gprs base |
| 24 | + .irp n,1,2,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 |
| 25 | + st.d $r\n, \base, 8 * \n |
| 26 | + .endr |
| 27 | +.endm |
| 28 | + |
| 29 | +.macro restore_gprs base |
| 30 | + .irp n,1,2,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 |
| 31 | + ld.d $r\n, \base, 8 * \n |
| 32 | + .endr |
| 33 | +.endm |
| 34 | + |
| 35 | +/* address of general exception should be 4K aligned */ |
| 36 | +.balign 4096 |
| 37 | +.global handle_exception |
| 38 | +handle_exception: |
| 39 | + csrwr sp, LOONGARCH_CSR_KS0 |
| 40 | + csrrd sp, LOONGARCH_CSR_KS1 |
| 41 | + addi.d sp, sp, -EXREGS_SIZE |
| 42 | + |
| 43 | + save_gprs sp |
| 44 | + /* save sp register to stack */ |
| 45 | + csrrd t0, LOONGARCH_CSR_KS0 |
| 46 | + st.d t0, sp, 3 * 8 |
| 47 | + |
| 48 | + csrrd t0, LOONGARCH_CSR_ERA |
| 49 | + st.d t0, sp, PC_OFFSET_EXREGS |
| 50 | + csrrd t0, LOONGARCH_CSR_ESTAT |
| 51 | + st.d t0, sp, ESTAT_OFFSET_EXREGS |
| 52 | + csrrd t0, LOONGARCH_CSR_BADV |
| 53 | + st.d t0, sp, BADV_OFFSET_EXREGS |
| 54 | + |
| 55 | + or a0, sp, zero |
| 56 | + bl route_exception |
| 57 | + restore_gprs sp |
| 58 | + csrrd sp, LOONGARCH_CSR_KS0 |
| 59 | + ertn |
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