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RKSimonRKSimon
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[X86] combineConcatVectorOps - add handling for X86ISD::VSHL/VSRL/VSRA
These can be handled the same as the vector shift by immediate variants that are already handled.
1 parent 847bb26 commit c4f5fd7

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3 files changed

+19
-22
lines changed

3 files changed

+19
-22
lines changed

‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52619,6 +52619,9 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
5261952619
}
5262052620
LLVM_FALLTHROUGH;
5262152621
case X86ISD::VSRAI:
52622+
case X86ISD::VSHL:
52623+
case X86ISD::VSRL:
52624+
case X86ISD::VSRA:
5262252625
if (((VT.is256BitVector() && Subtarget.hasInt256()) ||
5262352626
(VT.is512BitVector() && Subtarget.useAVX512Regs() &&
5262452627
(EltSizeInBits >= 32 || Subtarget.useBWIRegs()))) &&

‎llvm/test/CodeGen/X86/vector-fshr-128.ll

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1212,11 +1212,10 @@ define <4 x i32> @splatvar_funnnel_v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> %
12121212
; AVX512VL-LABEL: splatvar_funnnel_v4i32:
12131213
; AVX512VL: # %bb.0:
12141214
; AVX512VL-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1215-
; AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1216-
; AVX512VL-NEXT: vpsrlq %xmm2, %xmm3, %xmm3
12171215
; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1218-
; AVX512VL-NEXT: vpsrlq %xmm2, %xmm0, %xmm0
12191216
; AVX512VL-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
1217+
; AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm1
1218+
; AVX512VL-NEXT: vpsrlq %xmm1, %ymm0, %ymm0
12201219
; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0
12211220
; AVX512VL-NEXT: vzeroupper
12221221
; AVX512VL-NEXT: retq
@@ -1244,11 +1243,10 @@ define <4 x i32> @splatvar_funnnel_v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> %
12441243
; AVX512VLBW-LABEL: splatvar_funnnel_v4i32:
12451244
; AVX512VLBW: # %bb.0:
12461245
; AVX512VLBW-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1247-
; AVX512VLBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1248-
; AVX512VLBW-NEXT: vpsrlq %xmm2, %xmm3, %xmm3
12491246
; AVX512VLBW-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1250-
; AVX512VLBW-NEXT: vpsrlq %xmm2, %xmm0, %xmm0
12511247
; AVX512VLBW-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
1248+
; AVX512VLBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm1
1249+
; AVX512VLBW-NEXT: vpsrlq %xmm1, %ymm0, %ymm0
12521250
; AVX512VLBW-NEXT: vpmovqd %ymm0, %xmm0
12531251
; AVX512VLBW-NEXT: vzeroupper
12541252
; AVX512VLBW-NEXT: retq
@@ -1521,23 +1519,21 @@ define <16 x i8> @splatvar_funnnel_v16i8(<16 x i8> %x, <16 x i8> %y, <16 x i8> %
15211519
; AVX512VLBW-LABEL: splatvar_funnnel_v16i8:
15221520
; AVX512VLBW: # %bb.0:
15231521
; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
1524-
; AVX512VLBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1525-
; AVX512VLBW-NEXT: vpsrlw %xmm2, %xmm3, %xmm3
15261522
; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1527-
; AVX512VLBW-NEXT: vpsrlw %xmm2, %xmm0, %xmm0
15281523
; AVX512VLBW-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
1524+
; AVX512VLBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm1
1525+
; AVX512VLBW-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
15291526
; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0
15301527
; AVX512VLBW-NEXT: vzeroupper
15311528
; AVX512VLBW-NEXT: retq
15321529
;
15331530
; AVX512VLVBMI2-LABEL: splatvar_funnnel_v16i8:
15341531
; AVX512VLVBMI2: # %bb.0:
15351532
; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
1536-
; AVX512VLVBMI2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1537-
; AVX512VLVBMI2-NEXT: vpsrlw %xmm2, %xmm3, %xmm3
15381533
; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1539-
; AVX512VLVBMI2-NEXT: vpsrlw %xmm2, %xmm0, %xmm0
15401534
; AVX512VLVBMI2-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0
1535+
; AVX512VLVBMI2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm1
1536+
; AVX512VLVBMI2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
15411537
; AVX512VLVBMI2-NEXT: vpmovwb %ymm0, %xmm0
15421538
; AVX512VLVBMI2-NEXT: vzeroupper
15431539
; AVX512VLVBMI2-NEXT: retq

‎llvm/test/CodeGen/X86/vector-fshr-rot-128.ll

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1185,12 +1185,11 @@ define <16 x i8> @splatvar_funnnel_v16i8(<16 x i8> %x, <16 x i8> %amt) nounwind
11851185
;
11861186
; AVX512VLBW-LABEL: splatvar_funnnel_v16i8:
11871187
; AVX512VLBW: # %bb.0:
1188+
; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} xmm2 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1189+
; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
1190+
; AVX512VLBW-NEXT: vinserti128 $1, %xmm0, %ymm2, %ymm0
11881191
; AVX512VLBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1189-
; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
1190-
; AVX512VLBW-NEXT: vpsrlw %xmm1, %xmm2, %xmm2
1191-
; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1192-
; AVX512VLBW-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1193-
; AVX512VLBW-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
1192+
; AVX512VLBW-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
11941193
; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0
11951194
; AVX512VLBW-NEXT: vzeroupper
11961195
; AVX512VLBW-NEXT: retq
@@ -1210,12 +1209,11 @@ define <16 x i8> @splatvar_funnnel_v16i8(<16 x i8> %x, <16 x i8> %amt) nounwind
12101209
;
12111210
; AVX512VLVBMI2-LABEL: splatvar_funnnel_v16i8:
12121211
; AVX512VLVBMI2: # %bb.0:
1212+
; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} xmm2 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1213+
; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
1214+
; AVX512VLVBMI2-NEXT: vinserti128 $1, %xmm0, %ymm2, %ymm0
12131215
; AVX512VLVBMI2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1214-
; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
1215-
; AVX512VLVBMI2-NEXT: vpsrlw %xmm1, %xmm2, %xmm2
1216-
; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1217-
; AVX512VLVBMI2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1218-
; AVX512VLVBMI2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
1216+
; AVX512VLVBMI2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
12191217
; AVX512VLVBMI2-NEXT: vpmovwb %ymm0, %xmm0
12201218
; AVX512VLVBMI2-NEXT: vzeroupper
12211219
; AVX512VLVBMI2-NEXT: retq

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