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Fix some typos #1074

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4 changes: 2 additions & 2 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -41,9 +41,9 @@ tips:
@echo " 1) ensure that you have installed required tools described in README.md in same directory"
@echo " 2) enter the command: \"make sdk\""
@echo " 2. If you want to build Intel(R) SGX PSW with default configuration, please take the following steps:"
@echo " 1) ensure that you have installed additional required tools decribed in README.md in same directory"
@echo " 1) ensure that you have installed additional required tools described in README.md in same directory"
@echo " 2) ensure that you have installed latest Intel(R) SGX SDK Installer which could be downloaded from: https://software.intel.com/en-us/sgx-sdk/download" and followed Installation Guide in the same page to finish installation.
@echo " 3) enter the commmand: \"make psw\""
@echo " 3) enter the command: \"make psw\""
@echo " 3. If you want to build other targets, please also follow README.md in same directory"


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2 changes: 1 addition & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ The [linux-sgx-driver](https://github.com/intel/linux-sgx-driver) project hosts
The [intel-device-plugins-for-kubernetes](https://github.com/intel/intel-device-plugins-for-kubernetes) project enables users to run container applications running Intel(R) SGX enclaves in Kubernetes clusters. It also gives instructions how to set up ECDSA based attestation in a cluster.


The [intel-sgx-ssl](https://github.com/intel/intel-sgx-ssl) project provides a full-strength general purpose cryptography library for Intel(R) SGX enclave applications. It is based on the underlying OpenSSL* Open Source project. Intel(R) SGX provides a build combination to build out a SGXSSL based SDK as [below](#build-the-intelr-sgx-sdk-and-intelr-sgx-sdk-installer). Users could also utilize this cryptography library in SGX enclave applications seperately.
The [intel-sgx-ssl](https://github.com/intel/intel-sgx-ssl) project provides a full-strength general purpose cryptography library for Intel(R) SGX enclave applications. It is based on the underlying OpenSSL* Open Source project. Intel(R) SGX provides a build combination to build out a SGXSSL based SDK as [below](#build-the-intelr-sgx-sdk-and-intelr-sgx-sdk-installer). Users could also utilize this cryptography library in SGX enclave applications separately.


This repository provides a reference implementation of a Launch Enclave for 'Flexible Launch Control' under [psw/ae/ref_le](psw/ae/ref_le). The reference LE implementation can be used as a basis for enforcing different launch control policy by the platform developer or owner. To build and try it by yourself, please refer to the [ref_le.md](psw/ae/ref_le/ref_le.md) for details.
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2 changes: 1 addition & 1 deletion SampleCode/SampleAttestedTLS/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -101,7 +101,7 @@ Use the following QEMU command:

### TDX client application

The TDX client applicaiton is the same as non-enclave client application, except that it is running in guest TD.
The TDX client application is the same as non-enclave client application, except that it is running in guest TD.

## Build and run
```bash
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2 changes: 1 addition & 1 deletion external/epid-sdk/epid/member/unittests/context-test.cc
Original file line number Diff line number Diff line change
Expand Up @@ -472,7 +472,7 @@ TEST_F(EpidMemberTest, RegisterBaseNameSucceedsGivenMultipleUniqueBaseNames) {
EpidRegisterBasename(member, basename2.data(), basename2.size()));
EXPECT_EQ(kEpidNoErr,
EpidRegisterBasename(member, basename3.data(), basename3.size()));
// Verify that basenames registered succesfully
// Verify that basenames registered successfully
EXPECT_EQ(kEpidDuplicateErr,
EpidRegisterBasename(member, basename1.data(), basename1.size()));
EXPECT_EQ(kEpidDuplicateErr,
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2 changes: 1 addition & 1 deletion sdk/pthread/pthread.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -315,7 +315,7 @@ int pthread_join(pthread_t thread, void **retval)
return EDEADLK; /* Resource deadlock would occur */
}

// SKip to join if pthread_join() is called durig UNINIT ecall.
// SKip to join if pthread_join() is called during UNINIT ecall.
//
// No need to actually join the threads if pthread_join() is called
// during UNINIT ecall. Urts would sync the threads instead.
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2 changes: 1 addition & 1 deletion sdk/sign_tool/SignTool/manage_metadata.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -374,7 +374,7 @@ bool CMetadata::fill_enclave_css(const xml_parameter_t *para)
m_metadata->enclave_css.body.attribute_mask.xfrm |= SGX_XFRM_AMX;
break;
case FEATURE_LOADER_SELECTS:
// Loader will enable this feature if it is avaiable on HW
// Loader will enable this feature if it is available on HW
m_metadata->enclave_css.body.attributes.xfrm &= ~SGX_XFRM_AMX;
m_metadata->enclave_css.body.attribute_mask.xfrm &= ~SGX_XFRM_AMX;
break;
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2 changes: 1 addition & 1 deletion sdk/trts/ctd.c
Original file line number Diff line number Diff line change
Expand Up @@ -377,7 +377,7 @@ static uint8_t standard[256] = {
* _ _ _ _ _ _ _ _
* 1 2 3 4 5 6 7 8
* a b c
* We have a, b as similiar position as `standard` table, and the final c takes lower 4 bits
* We have a, b as similar position as `standard` table, and the final c takes lower 4 bits
* a is demote whether this is a valid opcode or escape opcode(since we are not going to support 3 opcode instructions)
* switch (a):
* case "0": escape opcode, 0x38 or 0x3A, refer to IA-32 manual A.2.4.3
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2 changes: 1 addition & 1 deletion sdk/trts/trts_util.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -138,7 +138,7 @@ int * get_errno_addr(void)
//The feature array coming from uRTS should be dealt with in the following way:
//Every bit except the MSb in each uint64 represents a certain feature.
//The MSb of each uint64_t, if set, indicates this is the last uint64_t to
//search for the feature's existance.
//search for the feature's existence.
//For example, if we have two uint64_t elements in the array:
//array[0]: xxxxxxxxxxxxxxxx array[1] Xxxxxxxxxxxxxxxx
//MSb of array[1] should already be set to one by uRTS. Shown by capital 'X' here.
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2 changes: 1 addition & 1 deletion sdk/trts/trts_veh.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -407,7 +407,7 @@ extern "C" __attribute__((regparm(1))) void internal_handle_exception(sgx_except
sgx_spin_unlock(&g_handler_lock);

// decrease the nested exception count before the customer
// handler execution, becasue the handler may never return
// handler execution, because the handler may never return
thread_data->exception_flag--;

// call exception handler until EXCEPTION_CONTINUE_EXECUTION is returned
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4 changes: 2 additions & 2 deletions sdk/ttls/ttls.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -162,7 +162,7 @@ sgx_status_t generate_cbor_pkhash_entry(const uint8_t *p_pub_key, size_t key_siz

uint8_t* hash_entry_buf;
size_t hash_entry_buf_size;
/* for the serialize_alloced buf, we need to free it seperately, as the pointer */
/* for the serialize_alloced buf, we need to free it separately, as the pointer */
/* passed to outside invoker, free it in outside invoker */
cbor_serialize_alloc(cbor_hash_entry, &hash_entry_buf, &hash_entry_buf_size);

Expand Down Expand Up @@ -221,7 +221,7 @@ sgx_status_t generate_cbor_claims(const uint8_t *p_pub_key,
return SGX_ERROR_OUT_OF_MEMORY;
}

/* for the serialize_alloced buf, we need to free it seperately, as the pointer */
/* for the serialize_alloced buf, we need to free it separately, as the pointer */
/* passed to outside invoker, free it in outside invoker */
uint8_t* claims_buf;
size_t claims_buf_size;
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