@@ -30,7 +30,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
30
30
struct platform_device * pdev = to_platform_device (dev );
31
31
struct device_node * node = dev -> of_node ;
32
32
struct resource * regs ;
33
- int err ;
33
+ int err , i ;
34
34
35
35
if (rockchip -> is_rc ) {
36
36
regs = platform_get_resource_byname (pdev ,
@@ -69,55 +69,23 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
69
69
if (rockchip -> link_gen < 0 || rockchip -> link_gen > 2 )
70
70
rockchip -> link_gen = 2 ;
71
71
72
- rockchip -> core_rst = devm_reset_control_get_exclusive (dev , "core" );
73
- if (IS_ERR (rockchip -> core_rst )) {
74
- if (PTR_ERR (rockchip -> core_rst ) != - EPROBE_DEFER )
75
- dev_err (dev , "missing core reset property in node\n" );
76
- return PTR_ERR (rockchip -> core_rst );
77
- }
78
-
79
- rockchip -> mgmt_rst = devm_reset_control_get_exclusive (dev , "mgmt" );
80
- if (IS_ERR (rockchip -> mgmt_rst )) {
81
- if (PTR_ERR (rockchip -> mgmt_rst ) != - EPROBE_DEFER )
82
- dev_err (dev , "missing mgmt reset property in node\n" );
83
- return PTR_ERR (rockchip -> mgmt_rst );
84
- }
85
-
86
- rockchip -> mgmt_sticky_rst = devm_reset_control_get_exclusive (dev ,
87
- "mgmt-sticky" );
88
- if (IS_ERR (rockchip -> mgmt_sticky_rst )) {
89
- if (PTR_ERR (rockchip -> mgmt_sticky_rst ) != - EPROBE_DEFER )
90
- dev_err (dev , "missing mgmt-sticky reset property in node\n" );
91
- return PTR_ERR (rockchip -> mgmt_sticky_rst );
92
- }
72
+ for (i = 0 ; i < ROCKCHIP_NUM_PM_RSTS ; i ++ )
73
+ rockchip -> pm_rsts [i ].id = rockchip_pci_pm_rsts [i ];
93
74
94
- rockchip -> pipe_rst = devm_reset_control_get_exclusive (dev , "pipe" );
95
- if (IS_ERR (rockchip -> pipe_rst )) {
96
- if (PTR_ERR (rockchip -> pipe_rst ) != - EPROBE_DEFER )
97
- dev_err (dev , "missing pipe reset property in node\n" );
98
- return PTR_ERR (rockchip -> pipe_rst );
99
- }
100
-
101
- rockchip -> pm_rst = devm_reset_control_get_exclusive (dev , "pm" );
102
- if (IS_ERR (rockchip -> pm_rst )) {
103
- if (PTR_ERR (rockchip -> pm_rst ) != - EPROBE_DEFER )
104
- dev_err (dev , "missing pm reset property in node\n" );
105
- return PTR_ERR (rockchip -> pm_rst );
106
- }
75
+ err = devm_reset_control_bulk_get_exclusive (dev ,
76
+ ROCKCHIP_NUM_PM_RSTS ,
77
+ rockchip -> pm_rsts );
78
+ if (err )
79
+ return dev_err_probe (dev , err , "Cannot get the PM reset\n" );
107
80
108
- rockchip -> pclk_rst = devm_reset_control_get_exclusive (dev , "pclk" );
109
- if (IS_ERR (rockchip -> pclk_rst )) {
110
- if (PTR_ERR (rockchip -> pclk_rst ) != - EPROBE_DEFER )
111
- dev_err (dev , "missing pclk reset property in node\n" );
112
- return PTR_ERR (rockchip -> pclk_rst );
113
- }
81
+ for (i = 0 ; i < ROCKCHIP_NUM_CORE_RSTS ; i ++ )
82
+ rockchip -> core_rsts [i ].id = rockchip_pci_core_rsts [i ];
114
83
115
- rockchip -> aclk_rst = devm_reset_control_get_exclusive (dev , "aclk" );
116
- if (IS_ERR (rockchip -> aclk_rst )) {
117
- if (PTR_ERR (rockchip -> aclk_rst ) != - EPROBE_DEFER )
118
- dev_err (dev , "missing aclk reset property in node\n" );
119
- return PTR_ERR (rockchip -> aclk_rst );
120
- }
84
+ err = devm_reset_control_bulk_get_exclusive (dev ,
85
+ ROCKCHIP_NUM_CORE_RSTS ,
86
+ rockchip -> core_rsts );
87
+ if (err )
88
+ return dev_err_probe (dev , err , "Cannot get the Core resets\n" );
121
89
122
90
if (rockchip -> is_rc )
123
91
rockchip -> perst_gpio = devm_gpiod_get_optional (dev , "ep" ,
@@ -129,29 +97,10 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
129
97
return dev_err_probe (dev , PTR_ERR (rockchip -> perst_gpio ),
130
98
"failed to get PERST# GPIO\n" );
131
99
132
- rockchip -> aclk_pcie = devm_clk_get (dev , "aclk" );
133
- if (IS_ERR (rockchip -> aclk_pcie )) {
134
- dev_err (dev , "aclk clock not found\n" );
135
- return PTR_ERR (rockchip -> aclk_pcie );
136
- }
137
-
138
- rockchip -> aclk_perf_pcie = devm_clk_get (dev , "aclk-perf" );
139
- if (IS_ERR (rockchip -> aclk_perf_pcie )) {
140
- dev_err (dev , "aclk_perf clock not found\n" );
141
- return PTR_ERR (rockchip -> aclk_perf_pcie );
142
- }
143
-
144
- rockchip -> hclk_pcie = devm_clk_get (dev , "hclk" );
145
- if (IS_ERR (rockchip -> hclk_pcie )) {
146
- dev_err (dev , "hclk clock not found\n" );
147
- return PTR_ERR (rockchip -> hclk_pcie );
148
- }
149
-
150
- rockchip -> clk_pcie_pm = devm_clk_get (dev , "pm" );
151
- if (IS_ERR (rockchip -> clk_pcie_pm )) {
152
- dev_err (dev , "pm clock not found\n" );
153
- return PTR_ERR (rockchip -> clk_pcie_pm );
154
- }
100
+ rockchip -> num_clks = devm_clk_bulk_get_all (dev , & rockchip -> clks );
101
+ if (rockchip -> num_clks < 0 )
102
+ return dev_err_probe (dev , rockchip -> num_clks ,
103
+ "failed to get clocks\n" );
155
104
156
105
return 0 ;
157
106
}
@@ -169,23 +118,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
169
118
int err , i ;
170
119
u32 regs ;
171
120
172
- err = reset_control_assert (rockchip -> aclk_rst );
173
- if (err ) {
174
- dev_err (dev , "assert aclk_rst err %d\n" , err );
175
- return err ;
176
- }
177
-
178
- err = reset_control_assert (rockchip -> pclk_rst );
179
- if (err ) {
180
- dev_err (dev , "assert pclk_rst err %d\n" , err );
181
- return err ;
182
- }
183
-
184
- err = reset_control_assert (rockchip -> pm_rst );
185
- if (err ) {
186
- dev_err (dev , "assert pm_rst err %d\n" , err );
187
- return err ;
188
- }
121
+ err = reset_control_bulk_assert (ROCKCHIP_NUM_PM_RSTS ,
122
+ rockchip -> pm_rsts );
123
+ if (err )
124
+ return dev_err_probe (dev , err , "Couldn't assert PM resets\n" );
189
125
190
126
for (i = 0 ; i < MAX_LANE_NUM ; i ++ ) {
191
127
err = phy_init (rockchip -> phys [i ]);
@@ -195,47 +131,19 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
195
131
}
196
132
}
197
133
198
- err = reset_control_assert (rockchip -> core_rst );
199
- if (err ) {
200
- dev_err (dev , "assert core_rst err %d\n" , err );
201
- goto err_exit_phy ;
202
- }
203
-
204
- err = reset_control_assert (rockchip -> mgmt_rst );
205
- if (err ) {
206
- dev_err (dev , "assert mgmt_rst err %d\n" , err );
207
- goto err_exit_phy ;
208
- }
209
-
210
- err = reset_control_assert (rockchip -> mgmt_sticky_rst );
211
- if (err ) {
212
- dev_err (dev , "assert mgmt_sticky_rst err %d\n" , err );
213
- goto err_exit_phy ;
214
- }
215
-
216
- err = reset_control_assert (rockchip -> pipe_rst );
134
+ err = reset_control_bulk_assert (ROCKCHIP_NUM_CORE_RSTS ,
135
+ rockchip -> core_rsts );
217
136
if (err ) {
218
- dev_err (dev , " assert pipe_rst err %d \n", err );
137
+ dev_err_probe (dev , err , "Couldn't assert Core resets \n" );
219
138
goto err_exit_phy ;
220
139
}
221
140
222
141
udelay (10 );
223
142
224
- err = reset_control_deassert (rockchip -> pm_rst );
225
- if (err ) {
226
- dev_err (dev , "deassert pm_rst err %d\n" , err );
227
- goto err_exit_phy ;
228
- }
229
-
230
- err = reset_control_deassert (rockchip -> aclk_rst );
231
- if (err ) {
232
- dev_err (dev , "deassert aclk_rst err %d\n" , err );
233
- goto err_exit_phy ;
234
- }
235
-
236
- err = reset_control_deassert (rockchip -> pclk_rst );
143
+ err = reset_control_bulk_deassert (ROCKCHIP_NUM_PM_RSTS ,
144
+ rockchip -> pm_rsts );
237
145
if (err ) {
238
- dev_err (dev , "deassert pclk_rst err %d\n" , err );
146
+ dev_err (dev , "Couldn't deassert PM resets %d\n" , err );
239
147
goto err_exit_phy ;
240
148
}
241
149
@@ -275,31 +183,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
275
183
goto err_power_off_phy ;
276
184
}
277
185
278
- /*
279
- * Please don't reorder the deassert sequence of the following
280
- * four reset pins.
281
- */
282
- err = reset_control_deassert (rockchip -> mgmt_sticky_rst );
283
- if (err ) {
284
- dev_err (dev , "deassert mgmt_sticky_rst err %d\n" , err );
285
- goto err_power_off_phy ;
286
- }
287
-
288
- err = reset_control_deassert (rockchip -> core_rst );
289
- if (err ) {
290
- dev_err (dev , "deassert core_rst err %d\n" , err );
291
- goto err_power_off_phy ;
292
- }
293
-
294
- err = reset_control_deassert (rockchip -> mgmt_rst );
295
- if (err ) {
296
- dev_err (dev , "deassert mgmt_rst err %d\n" , err );
297
- goto err_power_off_phy ;
298
- }
299
-
300
- err = reset_control_deassert (rockchip -> pipe_rst );
186
+ err = reset_control_bulk_deassert (ROCKCHIP_NUM_CORE_RSTS ,
187
+ rockchip -> core_rsts );
301
188
if (err ) {
302
- dev_err (dev , "deassert pipe_rst err %d\n" , err );
189
+ dev_err (dev , "Couldn't deassert Core reset %d\n" , err );
303
190
goto err_power_off_phy ;
304
191
}
305
192
@@ -375,50 +262,18 @@ int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip)
375
262
struct device * dev = rockchip -> dev ;
376
263
int err ;
377
264
378
- err = clk_prepare_enable (rockchip -> aclk_pcie );
379
- if (err ) {
380
- dev_err (dev , "unable to enable aclk_pcie clock\n" );
381
- return err ;
382
- }
383
-
384
- err = clk_prepare_enable (rockchip -> aclk_perf_pcie );
385
- if (err ) {
386
- dev_err (dev , "unable to enable aclk_perf_pcie clock\n" );
387
- goto err_aclk_perf_pcie ;
388
- }
389
-
390
- err = clk_prepare_enable (rockchip -> hclk_pcie );
391
- if (err ) {
392
- dev_err (dev , "unable to enable hclk_pcie clock\n" );
393
- goto err_hclk_pcie ;
394
- }
395
-
396
- err = clk_prepare_enable (rockchip -> clk_pcie_pm );
397
- if (err ) {
398
- dev_err (dev , "unable to enable clk_pcie_pm clock\n" );
399
- goto err_clk_pcie_pm ;
400
- }
265
+ err = clk_bulk_prepare_enable (rockchip -> num_clks , rockchip -> clks );
266
+ if (err )
267
+ return dev_err_probe (dev , err , "failed to enable clocks\n" );
401
268
402
269
return 0 ;
403
-
404
- err_clk_pcie_pm :
405
- clk_disable_unprepare (rockchip -> hclk_pcie );
406
- err_hclk_pcie :
407
- clk_disable_unprepare (rockchip -> aclk_perf_pcie );
408
- err_aclk_perf_pcie :
409
- clk_disable_unprepare (rockchip -> aclk_pcie );
410
- return err ;
411
270
}
412
271
EXPORT_SYMBOL_GPL (rockchip_pcie_enable_clocks );
413
272
414
- void rockchip_pcie_disable_clocks (void * data )
273
+ void rockchip_pcie_disable_clocks (struct rockchip_pcie * rockchip )
415
274
{
416
- struct rockchip_pcie * rockchip = data ;
417
275
418
- clk_disable_unprepare (rockchip -> clk_pcie_pm );
419
- clk_disable_unprepare (rockchip -> hclk_pcie );
420
- clk_disable_unprepare (rockchip -> aclk_perf_pcie );
421
- clk_disable_unprepare (rockchip -> aclk_pcie );
276
+ clk_bulk_disable_unprepare (rockchip -> num_clks , rockchip -> clks );
422
277
}
423
278
EXPORT_SYMBOL_GPL (rockchip_pcie_disable_clocks );
424
279
0 commit comments