An experiment to parse Sleigh (a CPU instruction DSL), with the ultimate goal of generating an assembler for x86_64.
It's a pre-alpha experiment.
Preprocessing works, and I was making good progress with the second, parsing pass when then I realized that LLVM's TableGen can emit a json file that is easy to parse and probably also contains a more detailed description of the CPU ISA's, so I'm switching my attention back to hu.dwim.tablegen-to-assembler.
My ultimate goal is an x86_64 assembler for Maru.
But it's easier to work in a mature language with Slime, so I'm hoping to finish this CL lib and then either:
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port this to Maru (ideal outcome),
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or simply generate the assembler for Maru and check it in into its repo (a less pleasing but more pragmatic shortcut).
Written by attila@lendvai.name.
The primary communication channel is the facilities on the project's GitHub page.