Support RISC-V architecture #5227
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added 17 commits
May 28, 2025 12:15
Firecracker creates seccomp filters at build time, and fails if there is no support for the targeted architecture. This commit adds support for the RISC-V architecture in the seccompiler crate. For now, we do not supply any riscv64-specific JSON file in `resources/seccomp`, adhering to the default one, since RISC-V support is experimental. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Introduce a scaffold for the riscv64 module under `vmm/src/arch`. For now, this mostly provides unimplemented stubs to build the basic components needed. We will gradually fill in the essential functions and structures for riscv64 support in follow-up commits. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Introduce the `kvm` module under `arch/riscv64`. This module will hold riscv64-specific KVM code and follows the existing `aarch64` implementation pattern. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Introduce the VM layout for riscv64, following the aarch64 logic as much as possible. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Introduce helper macros to easily retrieve the ID of riscv64 registers. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Add placeholder CPU template implementations for riscv64. These are not intended to be used as RISC-V support is still experimental and we don’t plan to configure vCPUs via templates for now. All functions either return defaults or are marked unimplemented. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Introduce vCPU-specific structures based on the aarch64 implementation. Implement the arch-specific `setup_boot_regs` function to properly initialize the required registers before vCPU boot. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Add `vm` architecture-specific state module, following the aarch64 paradigm. Add support for the in-kernel KVM Advanced Interrupt Architecture (AIA) irqchip, which emulates the AIA APLIC and per-hart IMSIC. Introduce a new `fdt` module to describe the provided hardware platform. Update `Cargo.toml` to include `vm-fdt` rust-vmm crate for riscv64 target. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
We don't plan to support snapshots on RISC-V at this stage. As a workaround to bypass related errors, set `SNAPSHOT_MAGIC_ID` to a dummy value. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
This is a temporary workaround. Since we lack proper testing support for riscv64 and don’t support the `test_utils` module, add two dummy file paths for `DEFAULT_KERNEL_IMAGE` and `NOISY_KERNEL_IMAGE` to silence compilation errors. We plan to either implement proper tests or remove `test_utils` usage from the riscv64 path in the future. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Implement `configure_system_for_boot` and `load_kernel` for riscv64, adding initial support for booting riscv64 microVMs. This gets the minimal pieces in place to start a Linux kernel inside a riscv64 VM. Populate `(Cpu)ConfigurationError` enums following the aarch64 logic, excluding the unreachable vCPU configuration error, as we don't support either custom or static vCPU configuration for riscv64 yet. Wire up module exports for riscv64-specific code. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
For now, we only plan to support Serial and Virtio devices for riscv64. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
This commit adds architecture-specific compilation guards to allow building the `vmm` crate for riscv64. Functionality not supported on riscv64 is excluded from the build. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
The `SendCtrlAltDel` API action is only supported on x86, as it relies on legacy PC hardware interfaces (like the i8042 controller) which are not present on other architectures. This commit disables `SendCtrlAltDel` action on riscv64 mirroring the existing handling for aarch64. See related discussion in issue firecracker-microvm#1339. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
This commit adds interrupt support for VirtIO block devices on riscv64, providing the necessary functionality to support interrupts for VirtIO devices in general. Interrupt delivery is implemented using KVM's in-kernel irqchip. Unlike x86_64 and aarch64, we couldn’t get the existing IRQFD-based approach to work reliably on riscv64. As a result, this implementation uses the `KVM_IRQ_LINE` ioctl to signal interrupts. To support this, it extends the `IrqTrigger` structure to hold both the raw VM file descriptor and the GSI number. Storing the raw file descriptor was necessary because `IrqTrigger` cannot hold a `VmFd` directly, as this type doesn't implement `Clone`. Having the raw VM file descriptor and the corresponding GSI allows `trigger_irq()` to perform the necessary ioctls to assert and de-assert interrupt lines when needed. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Implement interrupt support for the legacy serial console device on riscv64, following the same logic as the VirtIO device implementation. Replace the `EventFdTrigger` structure, which triggers IRQFD-related interrupts on x86_64 and aarch64, with a new `IrqLineTrigger` type. This type encapsulates the two required pieces of information to fire a `KVM_IRQ_LINE` interrupt: the raw file descriptor behind the `VmFd` type and the corresponding GSI number. This change is necessary because the `VmFd` structure does not implement `Clone`, preventing it from being carried into the `trigger()` function when injecting an interrupt from the serial device. Additionally, make the `allocate_mmio_resources()` method of `MMIODeviceManager` public. This is required to allocate an IRQ number *before* setting up the serial device, since `setup_serial_device()` builds the `IrqLineTrigger` and needs to know the IRQ number associated with the serial device at that point. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
Add interrupt support for VirtIO net devices on riscv64. This follows the logic used for VirtIO block devices, inserting interrupts via the `KVM_IRQ_LINE` ioctl. Signed-off-by: Dimitris Charisis <dchar@cslab.ece.ntua.gr>
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Thank you very much @DimitrisCharisis for this PR, your contribution and commitment to Firecracker. It is definitely appreciated even if we will not merge this PR. As you already are aware, at the moment of writing, we are not interested in supporting RISC-V architecture as there is not actual business/production usecase, it is a technology at early stage, and as you already correctly mentioned, it is difficult to get extensive testing or security coverage as we do not have access to real HW platforms. For this reason we can not provide the guarantees and level of quality which we usually aim to with a Firecracker release, and that explain why we can not merge such feature. We will definitely let you know if anything will change in the future, meanwhile thanks again for your work in Firecracker. |
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Changes
This PR adds architecture-specific modules to support booting and running RISC-V uVMs. It also introduces the necessary conditional compilation guards to the existing Firecracker code to enable selecting the RISC-V path without interfering with other architectures.
The major change this PR introduces, is the way interrupts are fired on RISC-V uVMs. We were not able to use the current IRQFD-based mechanism (used by x86_64 and aarch64), but we implemented it by firing
KVM_IRQ_LINEinterrupts to inform the in-kernel irqchip that KVM uses to emulate the AIA (Advanced Interrupt Architecture) interrupts, similar to how kvmtool does it for RISC-V.To do so, we extended the
IrqTriggerstructure for VirtIO interrupts and added an additional structure (IrqLineTrigger) for the serial console.Because
VmFddoes not implementCloneand we need access to the VM file descriptor insidetrigger(), we store the raw file descriptor in these structures, which allows us to issueioctlsfor asserting and de-asserting interrupt lines.Reason
This is an attempt to support RISC-V architecture in Firecracker.
We’ve added support for VirtIO block and net devices, and for the serial console device.
We are able to boot RISC-V uVMs running on a QEMU host that supports AIA. We were not able to test our work on physical RISC-V boards, as boards supporting the required H-extension are currently unavailable.
At this stage, several features remain unimplemented (e.g., snapshot support, boot timer,
vmgeniddevice support) and there is no formal test coverage for our changes.According to this comment, you are not currently interested in adding RISC-V support, but if that position changes, we can continue contributing additional features and add proper testing coverage for our changes.
License Acceptance
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CONTRIBUTING.md.PR Checklist
tools/devtool checkstyleto verify that the PR passes theautomated style checks.
how they are solving the problem in a clear and encompassing way.
in the PR.
CHANGELOG.md.Runbook for Firecracker API changes.
integration tests.
TODO.rust-vmm.