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alex-yang-upennalex-yang-upenn
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Merge pull request #5 from axiotisk/makefile_update
WIP: Makefile update [Re-opening PR Within Repo]
2 parents 67eb4df + 9693b25 commit 3f0d5dc

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-52
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4 files changed

+130
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‎hls4ml/backends/vitis_accelerator/vitis_accelerator_backend.py

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ def create_initial_config(
4848
config['AcceleratorConfig']['Vivado_Directives'] = vivado_directives
4949
return config
5050

51-
def build(self, model, reset=False, synth=True, vsynth=True, **kwargs):
51+
def build(self, model, reset=False, synth=True, vsynth=True, csim=False, cosim=False, debug=False, **kwargs):
5252
if 'linux' in sys.platform:
5353
if 'XILINX_VITIS' not in os.environ:
5454
raise Exception("XILINX_VITIS environmental variable missing. Please install XRT and Vitis, and run the setup scripts before building")
@@ -69,13 +69,22 @@ def build(self, model, reset=False, synth=True, vsynth=True, **kwargs):
6969

7070
if vsynth:
7171
if synth:
72-
target = "all"
72+
target = "all "
7373
else:
74-
target = "xclbin"
74+
target = "xclbin "
7575
elif synth:
76-
target = "hls"
76+
target = "hls "
7777
else:
78-
target = "host"
78+
target = "host "
79+
80+
if cosim:
81+
target += "TARGET=hw_emu "
82+
elif csim:
83+
target += "TARGET=sw_emu "
84+
85+
if debug:
86+
target += "DEBUG"
87+
7988
command = "make " + target
8089

8190
# Pre-loading libudev

‎hls4ml/templates/vitis_accelerator/Makefile

Lines changed: 113 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -1,62 +1,140 @@
1-
# Absolute path to top directory of accelerator project
2-
PWD = $(shell readlink -f .)
1+
# Check environment ###########################################################
32

4-
# Checks for XILINX_VITIS
53
ifndef XILINX_VITIS
64
$(error XILINX_VITIS variable is not set, please set correctly and rerun)
75
endif
86

9-
# Checks for XILINX_XRT
107
ifndef XILINX_XRT
118
$(error XILINX_XRT variable is not set, please set correctly and rerun)
129
endif
1310

14-
# Checks for XILINX_VIVADO
1511
ifndef XILINX_VIVADO
1612
$(error XILINX_VIVADO variable is not set, please set correctly and rerun)
1713
endif
1814

19-
# Checks for g++
2015
ifneq ($(shell expr $(shell g++ -dumpversion) \>= 5), 1)
2116
CXX := $(XILINX_VIVADO)/tps/lnx64/gcc-6.2.0/bin/g++
22-
$(warning [WARNING]: g++ version older. Using g++ provided by the tool : $(CXX))
17+
$(warning [WARNING]: g++ version older. Using g++ provided by the tool: $(CXX))
2318
endif
2419

25-
KERN_LIBRARIES += -I./ -I./firmware/ -I./firmware/weights -I./firmware/nnet_utils/
20+
# Configuration variables #####################################################
21+
22+
# Absolute path to top directory of accelerator project
23+
PWD := $(shell pwd)
24+
25+
# Target (hw, hw_emu, sw_emu)
26+
TARGET ?= hw
2627

27-
.PHONY: all
28-
all: hls xclbin
28+
# Accelerator card configuration file
29+
CARD_CFG ?= accelerator_card.cfg
2930

30-
# Building kernel
31-
./build/myproject_kernel.xo: kernel_wrapper.cpp
32-
mkdir -p ./build && mkdir -p ./build/xo
33-
v++ -c -t hw --config ./accelerator_card.cfg --temp_dir build/xo kernel_wrapper.cpp firmware/myproject.cpp -o ./build/myproject_kernel.xo $(KERN_LIBRARIES)
31+
# Platform (currently extracted from accelerator_card.cfg if not already set)
32+
PLATFORM ?= $(shell awk -F '=' '/platform=/ {print $$2}' $(CARD_CFG))
3433

35-
# hls-fpga-machine-learning packaging
34+
# Board Type (determines whether design will go through packaging step)
35+
BOARD_TYPE :=
36+
37+
# Kernel name
38+
KERNEL_NAME := myproject
39+
40+
# Wrapper name
41+
WRAPPER_NAME := kernel_wrapper
42+
43+
# Top level build directory
44+
BUILD_DIR := ./build_$(TARGET)
45+
ifdef DEBUG
46+
BUILD_DIR += _deb
47+
else
48+
BUILD_DIR += _rel
49+
endif
3650

37-
# Building Host
38-
INCLUDES += -I$(XILINX_XRT)/include/ -I$(XILINX_VIVADO)/include/ -I$(XILINX_HLS)/include/ \
39-
-I$(PWD)/libs/ -I$(PWD)/firmware/ -I$(PWD)/firmware/nnet_utils/
40-
CXXFLAGS += -Wall -std=c++11 -Wno-unknown-pragmas -g -O0
51+
# Directories for kernel synthesis
52+
XO_DIR := $(BUILD_DIR)/xo
53+
XCLBIN_DIR := $(BUILD_DIR)/xclbin
54+
55+
# CC flags for v++
56+
XOCCFLAGS := -t $(TARGET) --config $(CARD_CFG) --messageDb=$(BUILD_DIR)/kernel_wrapper.mdb
57+
58+
# Linker flags for V++
59+
XOLDFLAGS := -t $(TARGET) --config $(CARD_CFG) --messageDb=$(BUILD_DIR)/kernel_wrapper.mdb
60+
61+
# C++ compiler & linker flags
62+
CXXFLAGS := -Wall -std=c++11 -Wno-unknown-pragmas
4163
LDFLAGS = -L$(XILINX_XRT)/lib/ -lstdc++ -lpthread -lrt -lOpenCL
4264

43-
host: myproject_host_cl.cpp libs/xcl2.cpp
44-
$(CXX) $(CXXFLAGS) $^ -o $@ $(INCLUDES) $(LDFLAGS)
65+
ifdef DEBUG
66+
XOCCFLAGS += -g
67+
XOLDFLAGS += -g
68+
CXXFLAGS += -g -O0
69+
else
70+
# Optimization flags can be added here
71+
endif
72+
73+
.PHONY: all xclbin hls clean cleanhls cleanxclbin
74+
75+
all: xclbin host
76+
77+
# Kernel C/RTL synthesis ######################################################
78+
79+
HLS_INCLUDES := -I./ -I./firmware/ -I./firmware/weights -I./firmware/nnet_utils/
80+
81+
$(BUILD_DIR)/$(KERNEL_NAME)_kernel.xo: $(WRAPPER_NAME).cpp firmware/$(KERNEL_NAME).cpp
82+
mkdir -p $(XO_DIR)
83+
v++ -c $(XOCCFLAGS) --temp_dir $(XO_DIR) --log_dir $(XO_DIR) -o $@ $^ $(HLS_INCLUDES)
84+
85+
hls: $(BUILD_DIR)/$(KERNEL_NAME)_kernel.xo
86+
87+
# Kernel linking & packaging ##################################################
88+
89+
ifeq ($(BOARD_TYPE),alveo)
90+
# For Standard Alveo, a single step is required for linking and packaging
91+
# This is standard Alveo linking and packaging
92+
$(BUILD_DIR)/$(WRAPPER_NAME).xclbin: $(BUILD_DIR)/$(KERNEL_NAME)_kernel.xo
93+
mkdir -p $(XCLBIN_DIR)
94+
v++ -l $(XOLDFLAGS) --temp_dir $(XCLBIN_DIR) --log_dir $(XCLBIN_DIR) -o $@ $^
95+
96+
else ifeq ($(BOARD_TYPE),alveo-versal) || ($(BOARD_TYPE),versal)
97+
# For Versal architecture, linking and packaging are separate steps
98+
$(BUILD_DIR)/$(WRAPPER_NAME).xsa: $(BUILD_DIR)/$(KERNEL_NAME)_kernel.xo
99+
mkdir -p $(XCLBIN_DIR)
100+
v++ -l $(XOLDFLAGS) --temp_dir $(XCLBIN_DIR) --log_dir $(XCLBIN_DIR) -o $@ $^
101+
102+
# VCK5000 specific packaging
103+
XOCCPFLAGS := -t $(TARGET) -f $(PLATFORM) --package.boot_mode=ospi --messageDb=$(BUILD_DIR)/kernel_wrapper.mdb
104+
$(BUILD_DIR)/$(WRAPPER_NAME).xclbin: $(BUILD_DIR)/$(WRAPPER_NAME).xsa
105+
v++ -p $(XOCCPFLAGS) --temp_dir $(XCLBIN_DIR) --log_dir $(XCLBIN_DIR) -o $@ $^
106+
107+
else
108+
@echo "$(BOARD_TYPE) board type is currently unsupported"
109+
110+
endif
111+
112+
xclbin: $(BUILD_DIR)/$(WRAPPER_NAME).xclbin
113+
114+
# Host compilation ############################################################
115+
116+
INCLUDES := -I$(XILINX_XRT)/include/ -I$(XILINX_VIVADO)/include/ -I$(XILINX_HLS)/include/
117+
INCLUDES += -I$(PWD)/libs/ -I$(PWD)/firmware/ -I$(PWD)/firmware/nnet_utils/
118+
119+
host: $(KERNEL_NAME)_host_cl.cpp libs/xcl2.cpp
120+
$(CXX) $(CXXFLAGS) $^ -o $@ $(INCLUDES) $(LDFLAGS)
121+
122+
# Cleanup #####################################################################
45123

46-
.PHONY: hls
47-
hls: ./build/myproject_kernel.xo
124+
cleanxclbin:
125+
rm -rf host tb_data/hw_results.dat tb_data/tb_input_features.dat
126+
rm -rf *$(WRAPPER_NAME)*.log
127+
rm -rf $(BUILD_DIR)/$(WRAPPER_NAME).xclbin.* $(BUILD_DIR)/$(WRAPPER_NAME).xsa* $(BUILD_DIR)/$(WRAPPER_NAME).ltx $(BUILD_DIR)/$(WRAPPER_NAME).mdb
128+
rm -rf $(XCLBIN_DIR)
48129

49-
.PHONY: xclbin
50-
xclbin: ./build/kernel_wrapper.xclbin host
130+
cleanhls:
131+
rm -rf *$(KERNEL_NAME)_kernel*.log
132+
rm -rf $(BUILD_DIR)/$(KERNEL_NAME)_kernel.xo.*
133+
rm -rf $(XO_DIR)
51134

52-
# Cleaning stuff
53-
.PHONY: cleanxclbin
54-
-rm -rf host tb_data/hw_results.dat
55-
-rm -rf *kernel_wrapper*.log
56-
-rm -rf build/kernel_wrapper.xclbin* build/kernel_wrapper.xsa* build/kernel_wrapper.ltx build/kernel_wrapper.mdb
57-
-rm -rf build/xclbin
135+
clean: cleanxclbin cleanhls
58136

59-
.PHONY: cleanhls
60-
-rm -rf build/myproject_kernel.xo*
61-
-rm -rf build/xo
62-
-rm -rf *myproject_kernel*.log
137+
ultraclean:
138+
rm -rf host tb_data/hw_results.dat tb_data/tb_input_features.dat *.log
139+
rm -rf $(BUILD_DIR)
140+

‎hls4ml/templates/vitis_accelerator/accelerator_card.cfg

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
kernel=kernel_wrapper
2-
messageDb=build/kernel_wrapper.mdb
32
platform=MYPLATFORM
43
save-temps=1
54

‎hls4ml/writer/vitis_accelerator_writer.py

Lines changed: 3 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -184,17 +184,9 @@ def write_makefile(self, model):
184184
for line in f.readlines():
185185
if 'myproject' in line:
186186
newline = line.replace('myproject', project_name)
187-
elif '# hls-fpga-machine-learning packaging' in line:
188-
if board_type == "alveo":
189-
newline = f'./build/kernel_wrapper.xclbin: ./build/{project_name}_kernel.xo\n'
190-
newline += f'\tmkdir -p ./build/xclbin\n'
191-
newline += f'\tv++ -l -t hw --config ./accelerator_card.cfg --temp_dir build/xclbin ./build/{project_name}_kernel.xo -o ./build/kernel_wrapper.xclbin\n'
192-
elif board_type == "versal":
193-
newline = f'./build/kernel_wrapper.xsa: ./build/{project_name}_kernel.xo\n'
194-
newline += f'\tmkdir -p ./build/xclbin\n'
195-
newline += f'\tv++ -l -t hw --config ./accelerator_card.cfg --temp_dir build/xclbin ./build/{project_name}_kernel.xo -o ./build/kernel_wrapper.xsa\n\n'
196-
newline += f'./build/kernel_wrapper.xclbin: ./build/kernel_wrapper.xsa\n'
197-
newline += f'\tv++ --package -t hw --config ./accelerator_card.cfg --temp_dir build/xclbin ./build/kernel_wrapper.xsa -o ./build/kernel_wrapper.xclbin\n'
187+
if 'BOARD_TYPE :=' in line:
188+
newline = line
189+
newline += board_type
198190
else:
199191
newline = line
200192
fout.write(newline)

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