ISOCC_23-SCC

This project is licensed under the terms of the MIT license

Author

Yujin Lim

• Email: dbwls1229@kakao.com

Dongwhee Kim

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Paper title: [ISOCC'23] SCC: Efficient Error Correction Codes for MLC PCM

Paper URL: https://ieeexplore.ieee.org/document/10396372

Overview (Prior ECC schemes vs SCC)

References

• [1] S. Cha and H. Yoon, "High speed, minimal area, and low power sec code for drams with large I/O data widths," in ISCAS, 2007.
• [2] S. S. Liu, P. Reviriego, A. S. Macian, and et al., “Odd-weight-column sec-ded-taed codes,” Elec. Lett., vol. 52, no. 2, pp. 119-120, Jan. 2016.
• [3] S. Tripathi, J. Jana, J. Samanta, and et al., “FPGA and ASIC implementation of sec-ded-daec codes for sram applications,” in ICCDC, 2019.