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pci:dp1000: Update the number of outbound and inbound #973

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merged 2 commits into from
Jul 28, 2025

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WangJia-UR
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Update the number of outbound and inbound

Configure default maximum of 16 in and 16 out windows.

Signed-off-by: Zhang Xincheng <zhangxincheng@ultrarisc.com>
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
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Hi @WangJia-UR. Thanks for your PR.

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Hey @WangJia-UR - I've reviewed your changes and they look great!


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Pull Request Overview

This PR updates the PCI configuration for the dp1000 platform to support more inbound and outbound address translation unit (ATU) windows. The changes modify the default ATU size and address ranges to accommodate the increased window count.

  • Sets default ATU size to 8KB to support up to 16 inbound and 16 outbound windows
  • Fixes ATU window indexing in the host controller setup
  • Increases memory range sizes in device tree from 5GB to 13GB for all PCIe controllers

Reviewed Changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 1 comment.

File Description
pcie-ultrarisc.c Sets default ATU size to 8KB with explanatory comment
pcie-designware-host.c Fixes ATU window indexing from pre-increment to post-increment
dp1000.dts Updates mem64 prefetchable ranges from 0x5 to 0xd (5GB to 13GB)

@@ -702,7 +702,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
window_size = res_size > (pci->region_limit + 1) ?
(pci->region_limit + 1) : res_size;

ret = dw_pcie_prog_outbound_atu(pci, ++i, PCIE_ATU_TYPE_MEM,
ret = dw_pcie_prog_outbound_atu(pci, i++, PCIE_ATU_TYPE_MEM,
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Changing from ++i to i++ alters the behavior - the first ATU window will now use index 0 instead of index 1. Verify this is the intended behavior and that index 0 is valid for outbound ATU programming.

Suggested change
ret = dw_pcie_prog_outbound_atu(pci, i++, PCIE_ATU_TYPE_MEM,
ret = dw_pcie_prog_outbound_atu(pci, ++i, PCIE_ATU_TYPE_MEM,

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/ok-to-test

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[APPROVALNOTIFIER] This PR is NOT APPROVED

This pull-request has been approved by: RevySR
Once this PR has been reviewed and has the lgtm label, please assign opsiff for approval. For more information see the Code Review Process.

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deepin pr auto review

代码审查意见:

  1. dp1000.dts文件中,ranges属性中的mem64 prefetchable区域的bar值从0x5更改为0xd,这可能是为了适应新的硬件配置或功能需求。需要确认这一更改是否与硬件设计文档一致,并且是否有相应的驱动程序支持这种新的配置。

  2. pcie-designware-host.c文件中,dw_pcie_iatu_setup函数中,dw_pcie_prog_outbound_atu函数的调用参数i的递增操作从++i更改为i++,这可能会影响函数的行为。需要确认这一更改是否是有意为之,并且是否已经考虑了所有相关的调用场景。

  3. pcie-ultrarisc.c文件中,ultrarisc_pcie_probe函数中新增了一行代码pci->atu_size = SZ_8K;,这可能是为了设置默认的ATU(Address Translation Unit)大小。需要确认这一默认值是否适用于所有可能的硬件配置,并且是否有必要在所有情况下都设置这个值。

  4. 代码中没有发现明显的语法或逻辑错误,但是建议在修改后的代码中添加注释,说明为什么需要进行这些更改,以及这些更改如何影响系统的行为。

  5. 代码中没有发现明显的性能问题,但是建议进行性能测试,以确保这些更改不会对系统性能产生负面影响。

  6. 代码中没有发现明显的安全问题,但是建议进行安全审查,以确保新的配置不会引入任何安全漏洞。

总体来说,这些更改看起来是有意为之,但是需要进一步的确认和测试以确保它们不会引入任何问题。

@opsiff opsiff merged commit bc9c156 into deepin-community:linux-6.6.y Jul 28, 2025
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