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PcAtChipsetPkg: Use DV bit to stop the RTC first when changing the time
Legacy BIOS design sets only the Update Cycle Inhibit (SET) bit when changing the RTC time. Update Cycle Inhibit Bit may not be supported by the backend device (Common I2C RTC device). It could add Division Chain Select (DV) bit to stop the RTC first (Write to 0x07), Changing the RTC time and then Set the DV bit back. Signed-off-by: Di Zhang <di.zhang@intel.com>
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PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c

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@@ -561,6 +561,7 @@ PcRtcSetTime (
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{
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EFI_STATUS Status;
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EFI_TIME RtcTime;
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RTC_REGISTER_A RegisterA;
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RTC_REGISTER_B RegisterB;
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UINT32 TimerVar;
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@@ -638,6 +639,11 @@ PcRtcSetTime (
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RegisterB.Bits.Set = 1;
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RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data);
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RegisterA.Data = RtcRead (RTC_ADDRESS_REGISTER_A);
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//
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// Set Divider in Reset status, RTC stops
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//
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RtcWrite (RTC_ADDRESS_REGISTER_A, RegisterA.Data | RTC_DIV_RESET);
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//
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// Store the century value to RTC before converting to BCD format.
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//
@@ -660,6 +666,10 @@ PcRtcSetTime (
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RegisterB.Bits.Set = 0;
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RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data);
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//
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// Restore Divider status
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//
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RtcWrite (RTC_ADDRESS_REGISTER_A, RegisterA.Data);
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//
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// Release RTC Lock.
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//

PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h

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@@ -70,6 +70,7 @@ extern PC_RTC_MODULE_GLOBALS mModuleGlobal;
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//
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// Register A
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//
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#define RTC_DIV_RESET 0x70
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typedef struct {
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UINT8 Rs : 4; // Rate Selection Bits
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UINT8 Dv : 3; // Divisor

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