Skip to content

Commit fa4c855

Browse files
machschmittmachschmitt
committed
iio: adc: ad4000: Implement timestamp channel
Initial intent was to provide timestamps for ADC readings though the IIO timestamp channel was missing. Implement the timestamp channel. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
1 parent 0c36093 commit fa4c855

File tree

1 file changed

+58
-41
lines changed

1 file changed

+58
-41
lines changed

‎drivers/iio/adc/ad4000.c

Lines changed: 58 additions & 41 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@
5656
BIT(IIO_CHAN_INFO_SCALE) | \
5757
(_offl ? BIT(IIO_CHAN_INFO_SAMP_FREQ) : 0), \
5858
.info_mask_separate_available = (_reg_access ? BIT(IIO_CHAN_INFO_SCALE) : 0),\
59+
.scan_index = 0, \
5960
.scan_type = { \
6061
.sign = _sign, \
6162
.realbits = _real_bits, \
@@ -70,6 +71,12 @@
7071
(((_offl) || ((_real_bits) > 16)) ? 32 : 16), \
7172
(_reg_access), (_offl))
7273

74+
#define AD4000_DIFF_CHANNELS(_sign, _real_bits, _reg_access, _offl) \
75+
{ \
76+
AD4000_DIFF_CHANNEL(_sign, _real_bits, _reg_access, _offl), \
77+
IIO_CHAN_SOFT_TIMESTAMP(1) \
78+
}
79+
7380
#define __AD4000_PSEUDO_DIFF_CHANNEL(_sign, _real_bits, _storage_bits, \
7481
_reg_access, _offl) \
7582
{ \
@@ -81,6 +88,7 @@
8188
BIT(IIO_CHAN_INFO_OFFSET) | \
8289
(_offl ? BIT(IIO_CHAN_INFO_SAMP_FREQ) : 0), \
8390
.info_mask_separate_available = (_reg_access ? BIT(IIO_CHAN_INFO_SCALE) : 0),\
91+
.scan_index = 0, \
8492
.scan_type = { \
8593
.sign = _sign, \
8694
.realbits = _real_bits, \
@@ -95,6 +103,12 @@
95103
(((_offl) || ((_real_bits) > 16)) ? 32 : 16),\
96104
(_reg_access), (_offl))
97105

106+
#define AD4000_PSEUDO_DIFF_CHANNELS(_sign, _real_bits, _reg_access, _offl) \
107+
{ \
108+
AD4000_PSEUDO_DIFF_CHANNEL(_sign, _real_bits, _reg_access, _offl), \
109+
IIO_CHAN_SOFT_TIMESTAMP(1) \
110+
}
111+
98112
static const char * const ad4000_power_supplies[] = {
99113
"vdd", "vio"
100114
};
@@ -121,8 +135,8 @@ static const int ad4000_gains[] = {
121135

122136
struct ad4000_chip_info {
123137
const char *dev_name;
124-
struct iio_chan_spec chan_spec;
125-
struct iio_chan_spec reg_access_chan_spec;
138+
struct iio_chan_spec chan_spec[2];
139+
struct iio_chan_spec reg_access_chan_spec[2];
126140
struct iio_chan_spec offload_chan_spec;
127141
struct iio_chan_spec reg_access_offload_chan_spec;
128142
bool has_hardware_gain;
@@ -131,134 +145,134 @@ struct ad4000_chip_info {
131145

132146
static const struct ad4000_chip_info ad4000_chip_info = {
133147
.dev_name = "ad4000",
134-
.chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 0, 0),
135-
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 1, 0),
148+
.chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 16, 0, 0),
149+
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 16, 1, 0),
136150
.offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 0, 1),
137151
.reg_access_offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 1, 1),
138152
.max_rate_hz = 2 * MEGA,
139153
};
140154

141155
static const struct ad4000_chip_info ad4001_chip_info = {
142156
.dev_name = "ad4001",
143-
.chan_spec = AD4000_DIFF_CHANNEL('s', 16, 0, 0),
144-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 1, 0),
157+
.chan_spec = AD4000_DIFF_CHANNELS('s', 16, 0, 0),
158+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 16, 1, 0),
145159
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 0, 1),
146160
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 1, 1),
147161
.max_rate_hz = 2 * MEGA,
148162
};
149163

150164
static const struct ad4000_chip_info ad4002_chip_info = {
151165
.dev_name = "ad4002",
152-
.chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 0, 0),
153-
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 1, 0),
166+
.chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 18, 0, 0),
167+
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 18, 1, 0),
154168
.offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 0, 1),
155169
.reg_access_offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 1, 1),
156170
.max_rate_hz = 2 * MEGA,
157171
};
158172

159173
static const struct ad4000_chip_info ad4003_chip_info = {
160174
.dev_name = "ad4003",
161-
.chan_spec = AD4000_DIFF_CHANNEL('s', 18, 0, 0),
162-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 1, 0),
175+
.chan_spec = AD4000_DIFF_CHANNELS('s', 18, 0, 0),
176+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 18, 1, 0),
163177
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 0, 1),
164178
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 1, 1),
165179
.max_rate_hz = 2 * MEGA,
166180
};
167181

168182
static const struct ad4000_chip_info ad4004_chip_info = {
169183
.dev_name = "ad4004",
170-
.chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 0, 0),
171-
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 1, 0),
184+
.chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 16, 0, 0),
185+
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 16, 1, 0),
172186
.offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 0, 1),
173187
.reg_access_offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 1, 1),
174188
.max_rate_hz = 1 * MEGA,
175189
};
176190

177191
static const struct ad4000_chip_info ad4005_chip_info = {
178192
.dev_name = "ad4005",
179-
.chan_spec = AD4000_DIFF_CHANNEL('s', 16, 0, 0),
180-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 1, 0),
193+
.chan_spec = AD4000_DIFF_CHANNELS('s', 16, 0, 0),
194+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 16, 1, 0),
181195
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 0, 1),
182196
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 1, 1),
183197
.max_rate_hz = 1 * MEGA,
184198
};
185199

186200
static const struct ad4000_chip_info ad4006_chip_info = {
187201
.dev_name = "ad4006",
188-
.chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 0, 0),
189-
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 1, 0),
202+
.chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 18, 0, 0),
203+
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 18, 1, 0),
190204
.offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 0, 1),
191205
.reg_access_offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 1, 1),
192206
.max_rate_hz = 1 * MEGA,
193207
};
194208

195209
static const struct ad4000_chip_info ad4007_chip_info = {
196210
.dev_name = "ad4007",
197-
.chan_spec = AD4000_DIFF_CHANNEL('s', 18, 0, 0),
198-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 1, 0),
211+
.chan_spec = AD4000_DIFF_CHANNELS('s', 18, 0, 0),
212+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 18, 1, 0),
199213
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 0, 1),
200214
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 1, 1),
201215
.max_rate_hz = 1 * MEGA,
202216
};
203217

204218
static const struct ad4000_chip_info ad4008_chip_info = {
205219
.dev_name = "ad4008",
206-
.chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 0, 0),
207-
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 1, 0),
220+
.chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 16, 0, 0),
221+
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 16, 1, 0),
208222
.offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 0, 1),
209223
.reg_access_offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 16, 1, 1),
210224
.max_rate_hz = 500 * KILO,
211225
};
212226

213227
static const struct ad4000_chip_info ad4010_chip_info = {
214228
.dev_name = "ad4010",
215-
.chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 0, 0),
216-
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 1, 0),
229+
.chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 18, 0, 0),
230+
.reg_access_chan_spec = AD4000_PSEUDO_DIFF_CHANNELS('u', 18, 1, 0),
217231
.offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 0, 1),
218232
.reg_access_offload_chan_spec = AD4000_PSEUDO_DIFF_CHANNEL('u', 18, 1, 1),
219233
.max_rate_hz = 500 * KILO,
220234
};
221235

222236
static const struct ad4000_chip_info ad4011_chip_info = {
223237
.dev_name = "ad4011",
224-
.chan_spec = AD4000_DIFF_CHANNEL('s', 18, 0, 0),
225-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 1, 0),
238+
.chan_spec = AD4000_DIFF_CHANNELS('s', 18, 0, 0),
239+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 18, 1, 0),
226240
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 0, 1),
227241
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 1, 1),
228242
.max_rate_hz = 500 * KILO,
229243
};
230244

231245
static const struct ad4000_chip_info ad4020_chip_info = {
232246
.dev_name = "ad4020",
233-
.chan_spec = AD4000_DIFF_CHANNEL('s', 20, 0, 0),
234-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 1, 0),
247+
.chan_spec = AD4000_DIFF_CHANNELS('s', 20, 0, 0),
248+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 20, 1, 0),
235249
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 0, 1),
236250
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 1, 1),
237251
.max_rate_hz = 1800 * KILO,
238252
};
239253

240254
static const struct ad4000_chip_info ad4021_chip_info = {
241255
.dev_name = "ad4021",
242-
.chan_spec = AD4000_DIFF_CHANNEL('s', 20, 0, 0),
243-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 1, 0),
256+
.chan_spec = AD4000_DIFF_CHANNELS('s', 20, 0, 0),
257+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 20, 1, 0),
244258
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 0, 1),
245259
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 1, 1),
246260
.max_rate_hz = 1 * MEGA,
247261
};
248262

249263
static const struct ad4000_chip_info ad4022_chip_info = {
250264
.dev_name = "ad4022",
251-
.chan_spec = AD4000_DIFF_CHANNEL('s', 20, 0, 0),
252-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 1, 0),
265+
.chan_spec = AD4000_DIFF_CHANNELS('s', 20, 0, 0),
266+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 20, 1, 0),
253267
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 0, 1),
254268
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 20, 1, 1),
255269
.max_rate_hz = 500 * KILO,
256270
};
257271

258272
static const struct ad4000_chip_info adaq4001_chip_info = {
259273
.dev_name = "adaq4001",
260-
.chan_spec = AD4000_DIFF_CHANNEL('s', 16, 0, 0),
261-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 1, 0),
274+
.chan_spec = AD4000_DIFF_CHANNELS('s', 16, 0, 0),
275+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 16, 1, 0),
262276
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 0, 1),
263277
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 16, 1, 1),
264278
.has_hardware_gain = true,
@@ -267,8 +281,8 @@ static const struct ad4000_chip_info adaq4001_chip_info = {
267281

268282
static const struct ad4000_chip_info adaq4003_chip_info = {
269283
.dev_name = "adaq4003",
270-
.chan_spec = AD4000_DIFF_CHANNEL('s', 18, 0, 0),
271-
.reg_access_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 1, 0),
284+
.chan_spec = AD4000_DIFF_CHANNELS('s', 18, 0, 0),
285+
.reg_access_chan_spec = AD4000_DIFF_CHANNELS('s', 18, 1, 0),
272286
.offload_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 0, 1),
273287
.reg_access_offload_chan_spec = AD4000_DIFF_CHANNEL('s', 18, 1, 1),
274288
.has_hardware_gain = true,
@@ -886,11 +900,11 @@ static int ad4000_probe(struct spi_device *spi)
886900

887901
if (st->using_offload) {
888902
indio_dev->channels = &chip->reg_access_offload_chan_spec;
889-
ret = ad4000_prepare_offload_turbo_message(st, indio_dev->channels);
903+
ret = ad4000_prepare_offload_turbo_message(st, &indio_dev->channels[0]);
890904
if (ret)
891905
return ret;
892906
} else {
893-
indio_dev->channels = &chip->reg_access_chan_spec;
907+
indio_dev->channels = chip->reg_access_chan_spec;
894908
}
895909
ret = ad4000_prepare_3wire_mode_message(st, &indio_dev->channels[0]);
896910
if (ret)
@@ -908,12 +922,12 @@ static int ad4000_probe(struct spi_device *spi)
908922

909923
spi->cs_hold.value = AD4000_TCONV_NS;
910924
spi->cs_hold.unit = SPI_DELAY_UNIT_NSECS;
911-
ret = ad4000_prepare_offload_message(st, indio_dev->channels);
925+
ret = ad4000_prepare_offload_message(st, &indio_dev->channels[0]);
912926
if (ret)
913927
return ret;
914928
} else {
915929
indio_dev->info = &ad4000_info;
916-
indio_dev->channels = &chip->chan_spec;
930+
indio_dev->channels = chip->chan_spec;
917931
}
918932
ret = ad4000_prepare_3wire_mode_message(st, &indio_dev->channels[0]);
919933
if (ret)
@@ -926,7 +940,7 @@ static int ad4000_probe(struct spi_device *spi)
926940
"Unsupported sdi-pin + offload config\n");
927941

928942
indio_dev->info = &ad4000_info;
929-
indio_dev->channels = &chip->chan_spec;
943+
indio_dev->channels = chip->chan_spec;
930944
ret = ad4000_prepare_4wire_mode_message(st, indio_dev->channels);
931945
if (ret)
932946
return ret;
@@ -942,7 +956,10 @@ static int ad4000_probe(struct spi_device *spi)
942956

943957
st->max_rate_hz = chip->max_rate_hz;
944958
indio_dev->name = chip->dev_name;
945-
indio_dev->num_channels = 1;
959+
if (st->using_offload)
960+
indio_dev->num_channels = 1;
961+
else
962+
indio_dev->num_channels = 2;
946963

947964
ret = devm_mutex_init(dev, &st->lock);
948965
if (ret)
@@ -963,7 +980,7 @@ static int ad4000_probe(struct spi_device *spi)
963980
}
964981
}
965982

966-
ad4000_fill_scale_tbl(st, indio_dev->channels);
983+
ad4000_fill_scale_tbl(st, &indio_dev->channels[0]);
967984

968985
if (st->using_offload) {
969986
ret = ad4000_pwm_setup(spi, st);

0 commit comments

Comments
 (0)