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19 | 19 | #include "zynq-zed-adv7511.dtsi"
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20 | 20 |
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21 | 21 | / {
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22 |
| - eval_u3: eval-board-u3-regulator { |
23 |
| - compatible = "regulator-fixed"; |
24 |
| - regulator-name = "EVAL +2.5V supply (U3)"; |
25 |
| - regulator-min-microvolt = <2500000>; |
26 |
| - regulator-max-microvolt = <2500000>; |
27 |
| - regulator-always-on; |
28 |
| - }; |
29 |
| - |
30 |
| - eval_u5: eval-board-u5-regulator { |
31 |
| - compatible = "regulator-fixed"; |
32 |
| - regulator-name = "EVAL +5V supply (U5)"; |
33 |
| - regulator-min-microvolt = <5000000>; |
34 |
| - regulator-max-microvolt = <5000000>; |
35 |
| - regulator-always-on; |
36 |
| - }; |
37 |
| - |
38 |
| - eval_u10: eval-board-u10-regulator { |
39 |
| - compatible = "regulator-fixed"; |
40 |
| - regulator-name = "EVAL +5V supply (U10)"; |
41 |
| - regulator-min-microvolt = <5000000>; |
42 |
| - regulator-max-microvolt = <5000000>; |
43 |
| - regulator-always-on; |
44 |
| - }; |
45 |
| - |
46 |
| - eval_u12: eval-board-u12-regulator { |
47 |
| - compatible = "regulator-fixed"; |
48 |
| - regulator-name = "EVAL +2.5V supply (U12)"; |
49 |
| - regulator-min-microvolt = <2500000>; |
50 |
| - regulator-max-microvolt = <2500000>; |
51 |
| - regulator-always-on; |
52 |
| - }; |
| 22 | + eval_u3: eval-board-u3-regulator { |
| 23 | + compatible = "regulator-fixed"; |
| 24 | + regulator-name = "EVAL +2.5V supply (U3)"; |
| 25 | + regulator-min-microvolt = <2500000>; |
| 26 | + regulator-max-microvolt = <2500000>; |
| 27 | + regulator-always-on; |
| 28 | + }; |
| 29 | + |
| 30 | + eval_u5: eval-board-u5-regulator { |
| 31 | + compatible = "regulator-fixed"; |
| 32 | + regulator-name = "EVAL +5V supply (U5)"; |
| 33 | + regulator-min-microvolt = <5000000>; |
| 34 | + regulator-max-microvolt = <5000000>; |
| 35 | + regulator-always-on; |
| 36 | + }; |
| 37 | + |
| 38 | + eval_u10: eval-board-u10-regulator { |
| 39 | + compatible = "regulator-fixed"; |
| 40 | + regulator-name = "EVAL +5V supply (U10)"; |
| 41 | + regulator-min-microvolt = <5000000>; |
| 42 | + regulator-max-microvolt = <5000000>; |
| 43 | + regulator-always-on; |
| 44 | + }; |
| 45 | + |
| 46 | + eval_u12: eval-board-u12-regulator { |
| 47 | + compatible = "regulator-fixed"; |
| 48 | + regulator-name = "EVAL +2.5V supply (U12)"; |
| 49 | + regulator-min-microvolt = <2500000>; |
| 50 | + regulator-max-microvolt = <2500000>; |
| 51 | + regulator-always-on; |
| 52 | + }; |
53 | 53 | };
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54 | 54 |
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55 | 55 | &fpga_axi {
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56 |
| - adc_trigger: pwm@44b00000 { |
57 |
| - compatible = "adi,axi-pwmgen-2.00.a"; |
58 |
| - reg = <0x44b00000 0x1000>; |
59 |
| - #pwm-cells = <2>; |
60 |
| - clocks = <&spi_clk>; |
61 |
| - }; |
62 |
| - |
63 |
| - rx_dma: rx-dmac@44a30000 { |
64 |
| - compatible = "adi,axi-dmac-1.00.a"; |
65 |
| - reg = <0x44a30000 0x1000>; |
66 |
| - #dma-cells = <1>; |
67 |
| - interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; |
68 |
| - clocks = <&clkc 17>; |
69 |
| - |
70 |
| - adi,channels { |
71 |
| - #size-cells = <0>; |
72 |
| - #address-cells = <1>; |
73 |
| - |
74 |
| - dma-channel@0 { |
75 |
| - reg = <0>; |
76 |
| - adi,source-bus-width = <32>; |
77 |
| - adi,source-bus-type = <AXI_DMAC_BUS_TYPE_AXI_STREAM>; |
78 |
| - adi,destination-bus-width = <64>; |
79 |
| - adi,destination-bus-type = <AXI_DMAC_BUS_TYPE_AXI_MM>; |
80 |
| - }; |
81 |
| - }; |
82 |
| - }; |
83 |
| - |
84 |
| - spi_clk: clock-controller@44a70000 { |
85 |
| - compatible = "adi,axi-clkgen-2.00.a"; |
86 |
| - reg = <0x44a70000 0x1000>; |
87 |
| - #clock-cells = <0>; |
88 |
| - clocks = <&clkc 15>, <&clkc 15>; |
89 |
| - clock-names = "s_axi_aclk", "clkin1"; |
90 |
| - clock-output-names = "spi_clk"; |
91 |
| - |
92 |
| - /* needs to be high enough to allow >= 91.5MHz SCLK for turbo */ |
93 |
| - assigned-clocks = <&spi_clk>; |
94 |
| - assigned-clock-rates = <185000000>; |
95 |
| - }; |
96 |
| - |
97 |
| - axi_spi_engine_0: spi@44a00000 { |
98 |
| - compatible = "adi-ex,axi-spi-engine-1.00.a"; |
99 |
| - reg = <0x44a00000 0x1000>; |
100 |
| - interrupt-parent = <&intc>; |
101 |
| - interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; |
102 |
| - clocks = <&clkc 15>, <&spi_clk>; |
103 |
| - clock-names = "s_axi_aclk", "spi_clk"; |
104 |
| - |
105 |
| - #address-cells = <1>; |
106 |
| - #size-cells = <0>; |
107 |
| - |
108 |
| - ad7944: adc@0 { |
109 |
| - compatible = "adi,ad7944"; |
110 |
| - reg = <0>; |
111 |
| - spi-max-frequency = <111111111>; /* 9 ns period */ |
112 |
| - adi,spi-mode = "single"; |
113 |
| - avdd-supply = <&eval_u12>; |
114 |
| - dvdd-supply = <&eval_u12>; |
115 |
| - vio-supply = <&eval_u3>; |
116 |
| - bvdd-supply = <&eval_u10>; |
117 |
| - ref-supply = <&eval_u5>; |
118 |
| - turbo-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>; |
119 |
| - |
120 |
| - /* out of tree extensions */ |
121 |
| - dmas = <&rx_dma 0>; |
122 |
| - dma-names = "rx"; |
123 |
| - pwms = <&adc_trigger 0 0>; |
124 |
| - pwm-names = "cnv"; |
125 |
| - }; |
126 |
| - }; |
| 56 | + adc_trigger: pwm@44b00000 { |
| 57 | + compatible = "adi,axi-pwmgen-2.00.a"; |
| 58 | + reg = <0x44b00000 0x1000>; |
| 59 | + #pwm-cells = <2>; |
| 60 | + clocks = <&spi_clk>; |
| 61 | + }; |
| 62 | + |
| 63 | + rx_dma: rx-dmac@44a30000 { |
| 64 | + compatible = "adi,axi-dmac-1.00.a"; |
| 65 | + reg = <0x44a30000 0x1000>; |
| 66 | + #dma-cells = <1>; |
| 67 | + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; |
| 68 | + clocks = <&clkc 17>; |
| 69 | + |
| 70 | + adi,channels { |
| 71 | + #size-cells = <0>; |
| 72 | + #address-cells = <1>; |
| 73 | + |
| 74 | + dma-channel@0 { |
| 75 | + reg = <0>; |
| 76 | + adi,source-bus-width = <32>; |
| 77 | + adi,source-bus-type = <AXI_DMAC_BUS_TYPE_AXI_STREAM>; |
| 78 | + adi,destination-bus-width = <64>; |
| 79 | + adi,destination-bus-type = <AXI_DMAC_BUS_TYPE_AXI_MM>; |
| 80 | + }; |
| 81 | + }; |
| 82 | + }; |
| 83 | + |
| 84 | + spi_clk: clock-controller@44a70000 { |
| 85 | + compatible = "adi,axi-clkgen-2.00.a"; |
| 86 | + reg = <0x44a70000 0x1000>; |
| 87 | + #clock-cells = <0>; |
| 88 | + clocks = <&clkc 15>, <&clkc 15>; |
| 89 | + clock-names = "s_axi_aclk", "clkin1"; |
| 90 | + clock-output-names = "spi_clk"; |
| 91 | + |
| 92 | + /* needs to be high enough to allow >= 91.5MHz SCLK for turbo */ |
| 93 | + assigned-clocks = <&spi_clk>; |
| 94 | + assigned-clock-rates = <185000000>; |
| 95 | + }; |
| 96 | + |
| 97 | + axi_spi_engine_0: spi@44a00000 { |
| 98 | + compatible = "adi-ex,axi-spi-engine-1.00.a"; |
| 99 | + reg = <0x44a00000 0x1000>; |
| 100 | + interrupt-parent = <&intc>; |
| 101 | + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; |
| 102 | + clocks = <&clkc 15>, <&spi_clk>; |
| 103 | + clock-names = "s_axi_aclk", "spi_clk"; |
| 104 | + |
| 105 | + #address-cells = <1>; |
| 106 | + #size-cells = <0>; |
| 107 | + |
| 108 | + ad7944: adc@0 { |
| 109 | + compatible = "adi,ad7944"; |
| 110 | + reg = <0>; |
| 111 | + spi-max-frequency = <111111111>; /* 9 ns period */ |
| 112 | + adi,spi-mode = "single"; |
| 113 | + avdd-supply = <&eval_u12>; |
| 114 | + dvdd-supply = <&eval_u12>; |
| 115 | + vio-supply = <&eval_u3>; |
| 116 | + bvdd-supply = <&eval_u10>; |
| 117 | + ref-supply = <&eval_u5>; |
| 118 | + turbo-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>; |
| 119 | + |
| 120 | + /* out of tree extensions */ |
| 121 | + dmas = <&rx_dma 0>; |
| 122 | + dma-names = "rx"; |
| 123 | + pwms = <&adc_trigger 0 0>; |
| 124 | + pwm-names = "cnv"; |
| 125 | + }; |
| 126 | + }; |
127 | 127 | };
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128 | 128 |
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129 | 129 | &gpio0 {
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130 |
| - ad7944-mode { |
131 |
| - /* pull SDI line on ADC high for 3-wire mode */ |
132 |
| - gpio-hog; |
133 |
| - gpios = <88 GPIO_ACTIVE_HIGH>; |
134 |
| - output-high; |
135 |
| - }; |
| 130 | + ad7944-mode { |
| 131 | + /* pull SDI line on ADC high for 3-wire mode */ |
| 132 | + gpio-hog; |
| 133 | + gpios = <88 GPIO_ACTIVE_HIGH>; |
| 134 | + output-high; |
| 135 | + }; |
136 | 136 | };
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