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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
| 2 | +/* |
| 3 | + * Analog Devices AD4696 |
| 4 | + * |
| 5 | + * hdl_project: <ad469x_fmc/zed> |
| 6 | + * |
| 7 | + * Copyright (C) 2024 Analog Devices Inc. |
| 8 | + */ |
| 9 | +/dts-v1/; |
| 10 | + |
| 11 | +#include <dt-bindings/dma/axi-dmac.h> |
| 12 | +#include <dt-bindings/interrupt-controller/irq.h> |
| 13 | +#include <dt-bindings/gpio/gpio.h> |
| 14 | +#include <dt-bindings/iio/adi,ad4695.h> |
| 15 | + |
| 16 | +#include "zynq-zed.dtsi" |
| 17 | +#include "zynq-zed-adv7511.dtsi" |
| 18 | + |
| 19 | +/ { |
| 20 | + refin: regulator-refin { |
| 21 | + compatible = "regulator-fixed"; |
| 22 | + regulator-name = "refin"; |
| 23 | + regulator-min-microvolt = <5000000>; |
| 24 | + regulator-max-microvolt = <5000000>; |
| 25 | + regulator-always-on; |
| 26 | + }; |
| 27 | + |
| 28 | + avdd: regulator-avdd { |
| 29 | + compatible = "regulator-fixed"; |
| 30 | + regulator-name = "avdd"; |
| 31 | + regulator-min-microvolt = <5000000>; |
| 32 | + regulator-max-microvolt = <5000000>; |
| 33 | + regulator-always-on; |
| 34 | + }; |
| 35 | + |
| 36 | + ldo_in: regulator-ldo-in { |
| 37 | + compatible = "regulator-fixed"; |
| 38 | + regulator-name = "ldo-in"; |
| 39 | + regulator-min-microvolt = <5000000>; |
| 40 | + regulator-max-microvolt = <5000000>; |
| 41 | + regulator-always-on; |
| 42 | + }; |
| 43 | + |
| 44 | + vio: regulator-vio { |
| 45 | + compatible = "regulator-fixed"; |
| 46 | + regulator-name = "vio"; |
| 47 | + regulator-min-microvolt = <1800000>; |
| 48 | + regulator-max-microvolt = <1800000>; |
| 49 | + regulator-always-on; |
| 50 | + }; |
| 51 | + |
| 52 | + com: regulator-com { |
| 53 | + compatible = "regulator-fixed"; |
| 54 | + regulator-name = "com"; |
| 55 | + regulator-min-microvolt = <2500000>; |
| 56 | + regulator-max-microvolt = <2500000>; |
| 57 | + regulator-always-on; |
| 58 | + }; |
| 59 | + |
| 60 | + in3: regulator-in3 { |
| 61 | + compatible = "regulator-fixed"; |
| 62 | + regulator-name = "in3"; |
| 63 | + regulator-min-microvolt = <2500000>; |
| 64 | + regulator-max-microvolt = <2500000>; |
| 65 | + regulator-always-on; |
| 66 | + }; |
| 67 | +}; |
| 68 | + |
| 69 | +&fpga_axi { |
| 70 | + rx_dma: rx-dmac@44a30000 { |
| 71 | + compatible = "adi,axi-dmac-1.00.a"; |
| 72 | + reg = <0x44a30000 0x1000>; |
| 73 | + #dma-cells = <1>; |
| 74 | + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; |
| 75 | + clocks = <&clkc 15>; |
| 76 | + |
| 77 | + adi,channels { |
| 78 | + #size-cells = <0>; |
| 79 | + #address-cells = <1>; |
| 80 | + |
| 81 | + dma-channel@0 { |
| 82 | + reg = <0>; |
| 83 | + adi,source-bus-width = <64>; |
| 84 | + adi,source-bus-type = <AXI_DMAC_BUS_TYPE_AXI_STREAM>; |
| 85 | + adi,destination-bus-width = <64>; |
| 86 | + adi,destination-bus-type = <AXI_DMAC_BUS_TYPE_AXI_MM>; |
| 87 | + }; |
| 88 | + }; |
| 89 | + }; |
| 90 | + |
| 91 | + adc_trigger: pwm@44b00000 { |
| 92 | + compatible = "adi,axi-pwmgen"; |
| 93 | + reg = <0x44b00000 0x1000>; |
| 94 | + #pwm-cells = <2>; |
| 95 | + clocks = <&spi_clk>; |
| 96 | + }; |
| 97 | + |
| 98 | + spi_clk: axi-clkgen@44a70000 { |
| 99 | + compatible = "adi,axi-clkgen-2.00.a"; |
| 100 | + reg = <0x44a70000 0x10000>; |
| 101 | + #clock-cells = <0>; |
| 102 | + clocks = <&clkc 15>, <&clkc 15>; |
| 103 | + clock-names = "s_axi_aclk", "clkin1"; |
| 104 | + clock-output-names = "spi_clk"; |
| 105 | + }; |
| 106 | + |
| 107 | + axi_spi_engine: spi@44a00000 { |
| 108 | + compatible = "adi-ex,axi-spi-engine-1.00.a"; |
| 109 | + reg = <0x44a00000 0x1FF>; |
| 110 | + interrupt-parent = <&intc>; |
| 111 | + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; |
| 112 | + clocks = <&clkc 15>, <&spi_clk>; |
| 113 | + clock-names = "s_axi_aclk", "spi_clk"; |
| 114 | + num-cs = <1>; |
| 115 | + |
| 116 | + #address-cells = <1>; |
| 117 | + #size-cells = <0>; |
| 118 | + |
| 119 | + ad4696: adc@0 { |
| 120 | + compatible = "adi,ad4696"; |
| 121 | + reg = <0>; |
| 122 | + spi-cpol; |
| 123 | + spi-cpha; |
| 124 | + spi-max-frequency = <5000000>; |
| 125 | + avdd-supply = <&avdd>; |
| 126 | + ldo-in-supply = <&ldo_in>; |
| 127 | + vio-supply = <&vio>; |
| 128 | + refin-supply = <&refin>; |
| 129 | + com-supply = <&com>; |
| 130 | + in3-supply = <&in3>; |
| 131 | + reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>; |
| 132 | + |
| 133 | + #address-cells = <1>; |
| 134 | + #size-cells = <0>; |
| 135 | + |
| 136 | + /* Pseudo-differential channel between IN0 and REFGND. */ |
| 137 | + channel@0 { |
| 138 | + reg = <0>; |
| 139 | + }; |
| 140 | + |
| 141 | + /* Pseudo-differential channel between IN1 and COM. */ |
| 142 | + channel@1 { |
| 143 | + reg = <1>; |
| 144 | + common-mode-channel = <AD4695_COMMON_MODE_COM>; |
| 145 | + bipolar; |
| 146 | + }; |
| 147 | + |
| 148 | + /* Pseudo-differential channel between IN2 and IN3. */ |
| 149 | + channel@2 { |
| 150 | + reg = <2>; |
| 151 | + common-mode-channel = <3>; |
| 152 | + bipolar; |
| 153 | + }; |
| 154 | + }; |
| 155 | + }; |
| 156 | +}; |
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