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arch: arm: boot: dts : Add AD4696 devicetree
Add devicetree for ad469x_fmcz/zed project Signed-off-by: RaduSabau1 <radu.sabau@analog.com>
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Analog Devices AD4696
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*
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* hdl_project: <ad469x_fmc/zed>
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*
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* Copyright (C) 2024 Analog Devices Inc.
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*/
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/dts-v1/;
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#include <dt-bindings/dma/axi-dmac.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/iio/adi,ad4695.h>
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#include "zynq-zed.dtsi"
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#include "zynq-zed-adv7511.dtsi"
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/ {
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refin: regulator-refin {
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compatible = "regulator-fixed";
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regulator-name = "refin";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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avdd: regulator-avdd {
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compatible = "regulator-fixed";
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regulator-name = "avdd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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ldo_in: regulator-ldo-in {
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compatible = "regulator-fixed";
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regulator-name = "ldo-in";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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vio: regulator-vio {
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compatible = "regulator-fixed";
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regulator-name = "vio";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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com: regulator-com {
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compatible = "regulator-fixed";
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regulator-name = "com";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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in3: regulator-in3 {
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compatible = "regulator-fixed";
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regulator-name = "in3";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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};
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&fpga_axi {
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rx_dma: rx-dmac@44a30000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x44a30000 0x1000>;
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#dma-cells = <1>;
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interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>;
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adi,channels {
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#size-cells = <0>;
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#address-cells = <1>;
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dma-channel@0 {
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reg = <0>;
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adi,source-bus-width = <64>;
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adi,source-bus-type = <AXI_DMAC_BUS_TYPE_AXI_STREAM>;
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adi,destination-bus-width = <64>;
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adi,destination-bus-type = <AXI_DMAC_BUS_TYPE_AXI_MM>;
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};
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};
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};
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adc_trigger: pwm@44b00000 {
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compatible = "adi,axi-pwmgen";
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reg = <0x44b00000 0x1000>;
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#pwm-cells = <2>;
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clocks = <&spi_clk>;
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};
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spi_clk: axi-clkgen@44a70000 {
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compatible = "adi,axi-clkgen-2.00.a";
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reg = <0x44a70000 0x10000>;
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#clock-cells = <0>;
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clocks = <&clkc 15>, <&clkc 15>;
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clock-names = "s_axi_aclk", "clkin1";
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clock-output-names = "spi_clk";
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};
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axi_spi_engine: spi@44a00000 {
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compatible = "adi-ex,axi-spi-engine-1.00.a";
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reg = <0x44a00000 0x1FF>;
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interrupt-parent = <&intc>;
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interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>, <&spi_clk>;
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clock-names = "s_axi_aclk", "spi_clk";
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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ad4696: adc@0 {
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compatible = "adi,ad4696";
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reg = <0>;
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spi-cpol;
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spi-cpha;
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spi-max-frequency = <5000000>;
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avdd-supply = <&avdd>;
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ldo-in-supply = <&ldo_in>;
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vio-supply = <&vio>;
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refin-supply = <&refin>;
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com-supply = <&com>;
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in3-supply = <&in3>;
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reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
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#address-cells = <1>;
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#size-cells = <0>;
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/* Pseudo-differential channel between IN0 and REFGND. */
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channel@0 {
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reg = <0>;
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};
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/* Pseudo-differential channel between IN1 and COM. */
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channel@1 {
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reg = <1>;
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common-mode-channel = <AD4695_COMMON_MODE_COM>;
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bipolar;
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};
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/* Pseudo-differential channel between IN2 and IN3. */
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channel@2 {
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reg = <2>;
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common-mode-channel = <3>;
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bipolar;
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};
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};
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};
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};

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