Update READMEs with VADJ info for ad9083_evb

Author: mandrica

projects/ad9083_evb/README.md

@@ -3,6 +3,7 @@
 - Evaluation board product page: [EVAL-AD9083](https://www.analog.com/eval-ad9083)
 - System documentation: https://wiki.analog.com/resources/eval/ad9083
 - HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/ad9083_evb/index.html
+- Evaluation board VADJ: 1.8V
 
 ## Supported parts
 
@@ -12,4 +13,4 @@
 
 ## Building the project
 
-Please enter the folder for the FPGA carrier you want to use and read the README.md.
+Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/ad9083_evb/a10soc/README.md

@@ -1,10 +1,14 @@
+<!-- no_build_example, no_no_os -->
+
 # AD9083_EVB/A10SOC HDL Project
 
+- VADJ with which it was tested in hardware: 1.8V
+
 ## Building the project
 
 ```
 cd projects/ad9083_evb/a10soc
 make
 ```
 
-Corresponding device tree: [socfpga_arria10_socdk_ad9083_fmc_ebz.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_ad9083_fmc_ebz.dts)
+Corresponding device tree: [socfpga_arria10_socdk_ad9083_fmc_ebz.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_ad9083_fmc_ebz.dts)

projects/ad9083_evb/zcu102/README.md

@@ -1,18 +1,34 @@
+<!-- no_no_os -->
+
 # AD9083_EVB/ZCU102 HDL Project
 
+- VADJ with which it was tested in hardware: 1.8V
+
 ## Building the project
 
 ```
 cd projects/ad9083_evb/zcu102
 make
 ```
 
-All of the RX/TX link modes can be found in the [AD9083 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ad9083.pdf). We offer support for only a few of them.
+All of the RX link modes can be found in the [AD9083 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ad9083.pdf). We offer support for only a few of them.
 
 The overwritable parameters from the environment:
 
-- [RX]_JESD_L - [RX] number of lanes per link
-- [RX]_JESD_M - [RX] number of converters per link
-- [RX]_JESD_S - [RX] number of samples per converter per frame
+- RX_JESD_L - RX number of lanes per link
+- RX_JESD_M - RX number of converters per link
+- RX_JESD_S - RX number of samples per converter per frame
+
+### Example configurations
+
+#### Default configuration
+
+This specific command is equivalent to running `make` only:
+
+```
+make RX_JESD_L=4 \
+RX_JESD_M=16 \
+RX_JESD_S=1
+```
 
-Corresponding device tree: [zynqmp-zcu102-rev10-ad9083-fmc-ebz.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9083-fmc-ebz.dts)
+Corresponding device tree: [zynqmp-zcu102-rev10-ad9083-fmc-ebz.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9083-fmc-ebz.dts)