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Update READMEs with VIO info for ad57xx_ardz
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projects/ad57xx_ardz/README.md

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- [EVAL-AD5782-ARDZ](https://www.analog.com/eval-ad5782ardz)
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- System documentation: TO BE ADDED
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- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/ad57xx_ardz/index.html
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- Evaluation board VIO: 3.3V
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## Supported parts
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## Building the project
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Please enter the folder for the FPGA carrier you want to use and read the README.md.
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Please enter the folder for the FPGA carrier you want to use and read the README.md.
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<!-- no_build_example, no_dts, no_no_os -->
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# AD57XX-ARDZ/CORAZ7S HDL Project
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- VIO with which it was tested in hardware: 3.3V
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## Building the project
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```
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cd projects/ad57xx_ardz/coraz7s
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make
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```
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```
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<!-- no_build_example, no_no_os -->
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# AD57XX-ARDZ/DE10NANO HDL Project
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- VIO with which it was tested in hardware: 3.3V
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## Building the project
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```
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cd projects/ad57xx_ardz/de10nano
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make
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```
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Corresponding device tree: [socfpga_cyclone5_de10_nano_ad5791.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10_nano_ad5791.dts)
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Corresponding device tree: [socfpga_cyclone5_de10_nano_ad5791.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_de10_nano_ad5791.dts)

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