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Tracking issue for RFC 76:
amaranth-boards
versioning policy.
feature
#1595
opened May 12, 2025 by
zyp
Add a documentation URL alias that always points at the latest release
improvement
#1592
opened May 11, 2025 by
zyp
Vivado transparent memory issue
backend:verilog
bug
toolchain:vivado
upstream
#1589
opened May 1, 2025 by
piotro888
convert
used with Component
does not handle constant signals
backport:v0.5
bug
#1574
opened Apr 14, 2025 by
rroohhh
Couldn't assign the register value to output port.
question
#1566
opened Feb 27, 2025 by
clin15-logi
Clock constraint on custom sync domain clock signal causes error during template rendering
question
#1565
opened Feb 12, 2025 by
qookei
Any{Seq,Const}
are not comparable to data structures
feature
meta:needs-rfc
#1555
opened Jan 27, 2025 by
rroohhh
Formatting of enums without
shape
in a data.StructLayout
does not work
improvement
#1534
opened Oct 14, 2024 by
rroohhh
Clarify documentation on the module usage in
wiring.connect()
improvement
#1509
opened Sep 10, 2024 by
5aji
A "must use" flag that can be put on signals that should not be left unconnected
feature
meta:needs-rfc
#1497
opened Aug 28, 2024 by
whitequark
Add a way to specify I/O port attributes at the time of buffer instantiation
feature
meta:needs-rfc
#1467
opened Jul 29, 2024 by
whitequark
Deprecate
signal.attrs[x] = y
, use platform.add_signal_attribute(signal, x, y)
instead
feature
meta:needs-rfc
#1466
opened Jul 29, 2024 by
whitequark
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