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1 parent 7dde2aa commit b466b72Copy full SHA for b466b72
nmigen/vendor/xilinx_7series.py
@@ -143,8 +143,7 @@ def _part(self):
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report_timing_summary -datasheet -max_paths 10 -file {{name}}_timing.rpt
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report_power -file {{name}}_power.rpt
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{{get_override("script_before_bitstream")|default("# (script_before_bitstream placeholder)")}}
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- write_bitstream -force {{name}}.bit
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- write_cfgmem -force -format bin -interface smapx32 -disablebitswap -loadbit "up 0 {{name}}.bit" {{name}}.bin
+ write_bitstream -force -bin_file {{name}}.bit
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{{get_override("script_after_bitstream")|default("# (script_after_bitstream placeholder)")}}
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quit
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""",
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