GitHub - ahmetikbal/single-cycle-datapath: CSE3038 Computer Organization Project #2 Verilog

Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
work		work
.gitattributes		.gitattributes
adder.v		adder.v
alu32.v		alu32.v
alucont.v		alucont.v
comporgproject2.cr.mti		comporgproject2.cr.mti
comporgproject2.mpf		comporgproject2.mpf
control.v		control.v
equality_comparator.v		equality_comparator.v
initDM.dat		initDM.dat
initIM.dat		initIM.dat
initReg.dat		initReg.dat
mult2_to_1_32.v		mult2_to_1_32.v
mult2_to_1_5.v		mult2_to_1_5.v
mult3_to_1_32.v		mult3_to_1_32.v
processor.v		processor.v
processor.v.bak		processor.v.bak
shift.v		shift.v
signext.v		signext.v
singlecycleMIPS-lite.spj		singlecycleMIPS-lite.spj
status_register.v		status_register.v
test_data.dat		test_data.dat
test_instructions.dat		test_instructions.dat
testbench.v		testbench.v
transcript		transcript
vsim.wlf		vsim.wlf
zeroext.v		zeroext.v