Pinned Loading

1. MEMORIES MEMORIES Public

   This repository contains the verilog codes for writing memories, especially RAM (single, dual, 3 port) using multiple methods in VIVADO DESIGN SUITE 2020.2

   Verilog

2. FPGA-DESIGN-FLOW-WITH-TRAFFIC-LIGHT-CONTROLLER-USING-XILINX-BOOLEAN-BOARD FPGA-DESIGN-FLOW-WITH-TRAFFIC-LIGHT-CONTROLLER-USING-XILINX-BOOLEAN-BOARD Public

   This repo contains the FPGA implementation of 4-way crossroad Traffic Light Controller with 8 states on Xilinx Boolean board

   Verilog

3. SYNCHRONOUS-FIFO SYNCHRONOUS-FIFO Public

   This repo contains system verilog codes for synchronous fifo design and its verification using self-checking testbench and class based verification.

   SystemVerilog

4. 32-bit-Pipelined-MIPS-Processor 32-bit-Pipelined-MIPS-Processor Public

   Designed the ISA for RISC based pipelined 32-bit MIPS processor and implemented a subset of instructions to verify the functionality. Tested the operation using 3 testcases and observed the dataflo…

   Verilog

5. AMBA-AHB-to-APB-BRIDGE-DESIGN AMBA-AHB-to-APB-BRIDGE-DESIGN Public

   Verilog

6. UART-FIFO UART-FIFO Public

   This repo contains the design and testbench of UART - FIFO Protocol in Verilog

   Verilog