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270 changes: 270 additions & 0 deletions MX25L6433F_STM32F446RE_NUCLEO/.cproject

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4 changes: 4 additions & 0 deletions MX25L6433F_STM32F446RE_NUCLEO/.gitignore
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.settings/
Debug/
Release/
ExtLoader_Debug/
33 changes: 33 additions & 0 deletions MX25L6433F_STM32F446RE_NUCLEO/.project
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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>MX25L6433F_STM32F446RE_NUCLEO</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>com.st.stm32cube.ide.mcu.MCUProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUCubeProjectNature</nature>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUCubeIdeServicesRevAev2ProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUAdvancedStructureProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUEndUserDisabledTrustZoneProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCUSingleCpuProjectNature</nature>
<nature>com.st.stm32cube.ide.mcu.MCURootProjectNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
</projectDescription>
35 changes: 35 additions & 0 deletions MX25L6433F_STM32F446RE_NUCLEO/Core/Inc/Dev_Inf.h
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#ifndef DEV_INF_H_
#define DEV_INF_H_

#define MCU_FLASH 1
#define NAND_FLASH 2
#define NOR_FLASH 3
#define SRAM 4
#define PSRAM 5
#define PC_CARD 6
#define SPI_FLASH 7
#define I2C_FLASH 8
#define SDRAM 9
#define I2C_EEPROM 10

#define SECTOR_NUM 10 // Max Number of Sector types

struct DeviceSectors {
unsigned long SectorNum; // Number of Sectors
unsigned long SectorSize; // Sector Size in Bytes
};

struct StorageInfo {
char DeviceName[100]; // Device Name and Description
unsigned short DeviceType; // Device Type: ONCHIP, EXT8BIT, EXT16BIT, ...
unsigned long DeviceStartAddress; // Default Device Start Address
unsigned long DeviceSize; // Total Size of Device
unsigned long PageSize; // Programming Page Size
unsigned char EraseValue; // Content of Erased Memory
struct DeviceSectors sectors[SECTOR_NUM];
};



#endif /* DEV_INF_H_ */
57 changes: 57 additions & 0 deletions MX25L6433F_STM32F446RE_NUCLEO/Core/Inc/gpio.h
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/**
******************************************************************************
* File Name : gpio.h
* Description : This file contains all the functions prototypes for
* the gpio
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __gpio_H
#define __gpio_H
#ifdef __cplusplus
extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "main.h"

/* USER CODE BEGIN Includes */

/* USER CODE END Includes */

/* USER CODE BEGIN Private defines */

/* USER CODE END Private defines */

void MX_GPIO_Init(void);

/* USER CODE BEGIN Prototypes */

/* USER CODE END Prototypes */

#ifdef __cplusplus
}
#endif
#endif /*__ pinoutConfig_H */

/**
* @}
*/

/**
* @}
*/

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
83 changes: 83 additions & 0 deletions MX25L6433F_STM32F446RE_NUCLEO/Core/Inc/main.h
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H

#ifdef __cplusplus
extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"

/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */

/* USER CODE END Includes */

/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */

/* USER CODE END ET */

/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */

/* USER CODE END EC */

/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */

/* USER CODE END EM */

/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);

/* USER CODE BEGIN EFP */

/* USER CODE END EFP */

/* Private defines -----------------------------------------------------------*/
#define FLASH_MISO_Pin GPIO_PIN_2
#define FLASH_MISO_GPIO_Port GPIOC
#define FLASH_MOSI_Pin GPIO_PIN_3
#define FLASH_MOSI_GPIO_Port GPIOC
#define FLASH_SCK_Pin GPIO_PIN_13
#define FLASH_SCK_GPIO_Port GPIOB
#define SWDIO_Pin GPIO_PIN_13
#define SWDIO_GPIO_Port GPIOA
#define SWCLK_Pin GPIO_PIN_14
#define SWCLK_GPIO_Port GPIOA
#define FLASH_CS_Pin GPIO_PIN_9
#define FLASH_CS_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */

/* USER CODE END Private defines */

#ifdef __cplusplus
}
#endif

#endif /* __MAIN_H */

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
58 changes: 58 additions & 0 deletions MX25L6433F_STM32F446RE_NUCLEO/Core/Inc/spi.h
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/**
******************************************************************************
* File Name : SPI.h
* Description : This file provides code for the configuration
* of the SPI instances.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __spi_H
#define __spi_H
#ifdef __cplusplus
extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "main.h"

/* USER CODE BEGIN Includes */

/* USER CODE END Includes */

extern SPI_HandleTypeDef hspi2;

/* USER CODE BEGIN Private defines */

/* USER CODE END Private defines */

void MX_SPI2_Init(void);

/* USER CODE BEGIN Prototypes */

/* USER CODE END Prototypes */

#ifdef __cplusplus
}
#endif
#endif /*__ spi_H */

/**
* @}
*/

/**
* @}
*/

/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
118 changes: 118 additions & 0 deletions MX25L6433F_STM32F446RE_NUCLEO/Core/Inc/stm32_spi_flash.h
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#ifndef _STM32_SPI_FLASH_H_
#define _STM32_SPI_FLASH_H_

#include "main.h"

/*
* MX25 series command hex code definition
*/
/* ID comands */
#define FLASH_CMD_RDID 0x9F //RDID (Read Identification)
#define FLASH_CMD_RES 0xAB //RES (Read Electronic ID)
#define FLASH_CMD_REMS 0x90 //REMS (Read Electronic & Device ID)

/* Register comands */
#define FLASH_CMD_WRSR 0x01 //WRSR (Write Status Register)
#define FLASH_CMD_RDSR 0x05 //RDSR (Read Status Register)
#define FLASH_CMD_WRSCUR 0x2F //WRSCUR (Write Security Register)
#define FLASH_CMD_RDSCUR 0x2B //RDSCUR (Read Security Register)
#define FLASH_CMD_RDCR 0x15 //RDCR (Read Configuration Register)

/* READ comands */
#define FLASH_CMD_READ 0x03 //READ (1 x I/O)
#define FLASH_CMD_2READ 0xBB //2READ (2 x I/O)
#define FLASH_CMD_4READ 0xEB //4READ (4 x I/O)
#define FLASH_CMD_FASTREAD 0x0B //FAST READ (Fast read data)
#define FLASH_CMD_DREAD 0x3B //DREAD (1In/2 Out fast read)
#define FLASH_CMD_QREAD 0x6B //QREAD (1In/4 Out fast read)
#define FLASH_CMD_RDSFDP 0x5A //RDSFDP (Read SFDP)

/* Program comands */
#define FLASH_CMD_WREN 0x06 //WREN (Write Enable)
#define FLASH_CMD_WRDI 0x04 //WRDI (Write Disable)
#define FLASH_CMD_PP 0x02 //PP (page program)
#define FLASH_CMD_4PP 0x38 //4PP (Quad page program)

/* Erase comands */
#define FLASH_CMD_SE 0x20 //SE (Sector Erase)
#define FLASH_CMD_BE32K 0x52 //BE32K (Block Erase 32kb)
#define FLASH_CMD_BE 0xD8 //BE (Block Erase)
#define FLASH_CMD_CE 0x60 //CE (Chip Erase) hex code: 60 or C7

/* Mode setting comands */
#define FLASH_CMD_DP 0xB9 //DP (Deep Power Down)
#define FLASH_CMD_RDP 0xAB //RDP (Release form Deep Power Down)
#define FLASH_CMD_ENSO 0xB1 //ENSO (Enter Secured OTP)
#define FLASH_CMD_EXSO 0xC1 //EXSO (Exit Secured OTP)
#ifdef SBL_CMD_0x77
#define FLASH_CMD_SBL 0x77 //SBL (Set Burst Length) new: 0x77
#else
#define FLASH_CMD_SBL 0xC0 //SBL (Set Burst Length) Old: 0xC0
#endif

/* Reset comands */
#define FLASH_CMD_RSTEN 0x66 //RSTEN (Reset Enable)
#define FLASH_CMD_RST 0x99 //RST (Reset Memory)

/* Security comands */
#ifdef LCR_CMD_0xDD_0xD5
#else
#endif

/* Suspend/Resume comands */
#define FLASH_CMD_PGM_ERS_S 0xB0 //PGM/ERS Suspend (Suspends Program/Erase)
#define FLASH_CMD_PGM_ERS_R 0x30 //PGM/ERS Erase (Resumes Program/Erase)
#define FLASH_CMD_NOP 0x00 //NOP (No Operation)



/*
* Flash control register mask define
*/
/* status register */
#define FLASH_WIP_MASK 0x01
#define FLASH_LDSO_MASK 0x02
#define FLASH_QE_MASK 0x40
/* security register */
#define FLASH_OTPLOCK_MASK 0x03
#define FLASH_4BYTE_MASK 0x04
#define FLASH_WPSEL_MASK 0x80
/* configuration reigster */
#define FLASH_DC_MASK 0x80
#define FLASH_DC_2BIT_MASK 0xC0
/* other */
#define BLOCK_PROTECT_MASK 0xff
#define BLOCK_LOCK_MASK 0x01



/*
* Flash ID, Timing Information Define
* (The following information could get from device specification)
*/
#define sFLASH_MX25L6433F_ID 0xc22017
#define sFLASH_MX25L6433F_ElectronicID 0x16
#define sFLASH_MX25L6433F_RESID0 0xc216
#define sFLASH_MX25L6433F_RESID1 0x16c2



/*
* Flash memory organization
*/
#define sFLASH_SPI_FLASH_SIZE 0x800000 /* 8 Mbytes */
#define sFLASH_SPI_SECTOR_SIZE 0x1000 /* 4K Sector size */
#define sFLASH_SPI_PAGE_SIZE 0x100 /* 256 Byte Page size */

/* High layer functions */
//void sFLASH_DeInit(void);
//void sFLASH_Init(void);
void sFLASH_EraseSector(uint32_t SectorAddr);
void sFLASH_EraseChip(void);
void sFLASH_WritePage(uint8_t* pBuffer, uint32_t WriteAddr, uint32_t NumByteToWrite);
void sFLASH_WriteBuffer(uint8_t* pBuffer, uint32_t WriteAddr, uint32_t NumByteToWrite);
void sFLASH_ReadBuffer(uint8_t* pBuffer, uint32_t ReadAddr, uint32_t NumByteToRead);
uint32_t sFLASH_ReadID(void);
//void sFLASH_StartReadSequence(uint32_t ReadAddr);

#endif /* _STM32_SPI_FLASH_H_ */
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