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Commit e8ce465

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Merge branch 'pci/controller/qcom-edma'
- Pass the Qcom Endpoint 4K alignment requirement for outbound windows to the EPF core so EPF drivers can use it (Manivannan Sadhasivam) - Use alignment restriction from EPF core in Qcom EPF MHI driver (Manivannan Sadhasivam) - Add Qcom Endpoint eDMA support by enabling the eDMA IRQ (Manivannan Sadhasivam) - Add Qcom MHI eDMA support (Manivannan Sadhasivam) - Add Qcom Snapdragon SM8450 support to the EPF MHI driver (Manivannan Sadhasivam) - Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup latency (Manivannan Sadhasivam) - Add pci_epc_mem_init() kernel-doc (Manivannan Sadhasivam) * pci/controller/qcom-edma: PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API PCI: epf-mhi: Use iATU for small transfers PCI: epf-mhi: Add support for SM8450 PCI: epf-mhi: Add eDMA support PCI: qcom-ep: Add eDMA support PCI: epf-mhi: Make use of the alignment restriction from EPF core PCI: qcom-ep: Pass alignment restriction to the EPF core
2 parents fa8805a + 06eea7d commit e8ce465

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drivers/pci/controller/dwc/pcie-qcom-ep.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,7 @@
7474
#define PARF_INT_ALL_PLS_ERR BIT(15)
7575
#define PARF_INT_ALL_PME_LEGACY BIT(16)
7676
#define PARF_INT_ALL_PLS_PME BIT(17)
77+
#define PARF_INT_ALL_EDMA BIT(22)
7778

7879
/* PARF_BDF_TO_SID_CFG register fields */
7980
#define PARF_BDF_TO_SID_BYPASS BIT(0)
@@ -395,7 +396,7 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pci)
395396
writel_relaxed(0, pcie_ep->parf + PARF_INT_ALL_MASK);
396397
val = PARF_INT_ALL_LINK_DOWN | PARF_INT_ALL_BME |
397398
PARF_INT_ALL_PM_TURNOFF | PARF_INT_ALL_DSTATE_CHANGE |
398-
PARF_INT_ALL_LINK_UP;
399+
PARF_INT_ALL_LINK_UP | PARF_INT_ALL_EDMA;
399400
writel_relaxed(val, pcie_ep->parf + PARF_INT_ALL_MASK);
400401

401402
ret = dw_pcie_ep_init_complete(&pcie_ep->pci.ep);
@@ -706,6 +707,7 @@ static const struct pci_epc_features qcom_pcie_epc_features = {
706707
.core_init_notifier = true,
707708
.msi_capable = true,
708709
.msix_capable = false,
710+
.align = SZ_4K,
709711
};
710712

711713
static const struct pci_epc_features *
@@ -743,6 +745,7 @@ static int qcom_pcie_ep_probe(struct platform_device *pdev)
743745
pcie_ep->pci.dev = dev;
744746
pcie_ep->pci.ops = &pci_ops;
745747
pcie_ep->pci.ep.ops = &pci_ep_ops;
748+
pcie_ep->pci.edma.nr_irqs = 1;
746749
platform_set_drvdata(pdev, pcie_ep);
747750

748751
ret = qcom_pcie_ep_get_resources(pdev, pcie_ep);

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