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konradybcioandersson
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clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value
Configure the disable wait value on the CX GDSC to ensure we don't get any undefined behavior. This was omitted when first adding the driver. Fixes: 8397e24 ("clk: qcom: Add GPU clock controller driver for SM6375") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230329140135.2178957-1-konrad.dybcio@linaro.org
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drivers/clk/qcom/gpucc-sm6375.c

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@@ -358,6 +358,7 @@ static struct clk_branch gpucc_sleep_clk = {
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static struct gdsc gpu_cx_gdsc = {
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.gdscr = 0x106c,
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.gds_hw_ctrl = 0x1540,
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.clk_dis_wait_val = 8,
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.pd = {
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.name = "gpu_cx_gdsc",
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},

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