BUAA_CO

It is a five-stage pipeline CPU based on MIPS, which is the project of BUAA's Computer Organization 2019.

Name		Name	Last commit message	Last commit date
Latest commit History 3 Commits
ADD4.v		ADD4.v
ALU.v		ALU.v
ByteEnable.v		ByteEnable.v
CMP.v		CMP.v
Controller.v		Controller.v
DM.v		DM.v
EXT.v		EXT.v
EX_MEM_register.v		EX_MEM_register.v
EX_module.v		EX_module.v
GRF.v		GRF.v
Hazard_Unit.v		Hazard_Unit.v
ID_EX_register.v		ID_EX_register.v
ID_module.v		ID_module.v
IF_ID_register.v		IF_ID_register.v
IF_module.v		IF_module.v
IM.v		IM.v
LEXT.v		LEXT.v
LICENSE		LICENSE
MEM_WB_register.v		MEM_WB_register.v
MEM_module.v		MEM_module.v
P6.zip		P6.zip
PC.v		PC.v
PC_beq.v		PC_beq.v
PC_jal.v		PC_jal.v
README.md		README.md
WB_module.v		WB_module.v
XALU.v		XALU.v
mips.v		mips.v
mux2_32.v		mux2_32.v
mux4_32.v		mux4_32.v
mux4_5.v		mux4_5.v

Provide feedback