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fix(h7): improved data cache maintenance #6310

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Jun 13, 2025
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13 changes: 3 additions & 10 deletions radio/src/targets/common/arm/stm32/diskio_sdio.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -345,8 +345,9 @@ static DSTATUS sdio_status(BYTE lun)
static DRESULT _read_dma(BYTE* buff, DWORD sector, UINT count)
{
ReadStatus = 0;

#if __CORTEX_M >= 0x07
SCB_CleanInvalidateDCache();
SCB_CleanInvalidateDCache_by_Addr(buff, count * 512);
#endif

if (HAL_SD_ReadBlocks_DMA(&sdio, buff, sector, count) != HAL_OK) {
Expand All @@ -358,10 +359,6 @@ static DRESULT _read_dma(BYTE* buff, DWORD sector, UINT count)
uint32_t timeout = HAL_GetTick();
while((ReadStatus == 0) && ((HAL_GetTick() - timeout) < SD_TIMEOUT));

#if __CORTEX_M >= 0x07
SCB_CleanInvalidateDCache();
#endif

if (ReadStatus == 0) {
TRACE("SD read timeout (s:%u c:%u)", sector, (uint32_t)count);
return RES_ERROR;
Expand All @@ -375,8 +372,6 @@ static DRESULT sdio_read(BYTE lun, BYTE * buff, DWORD sector, UINT count)
{
DRESULT res = RES_OK;

// TRACE("disk_read %d %p %10d %d", drv, buff, sector, count);

if (sdio_check_card_state_with_timeout(SD_TIMEOUT) < 0) {
return RES_ERROR;
}
Expand Down Expand Up @@ -405,7 +400,7 @@ static DRESULT sdio_read(BYTE lun, BYTE * buff, DWORD sector, UINT count)
static DRESULT _write_dma(const BYTE *buff, DWORD sector, UINT count)
{
#if __CORTEX_M >= 0x07
SCB_CleanDCache();
SCB_CleanDCache_by_Addr((void *)buff, count * 512);
#endif

WriteStatus = 0;
Expand All @@ -431,8 +426,6 @@ static DRESULT sdio_write(BYTE lun, const BYTE *buff, DWORD sector, UINT count)
{
DRESULT res = RES_OK;

// TRACE("disk_write %d %p %10d %d", drv, buff, sector, count);

if (sdio_check_card_state_with_timeout(SD_TIMEOUT) < 0) {
return RES_ERROR;
}
Expand Down
7 changes: 6 additions & 1 deletion radio/src/targets/st16/lcd_driver.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -48,11 +48,16 @@ static void startLcdRefresh(lv_disp_drv_t *disp_drv, uint16_t *buffer,
(void)disp_drv;
(void)copy_area;

// LTDC_Layer1->CFBAR &= ~(LTDC_LxCFBAR_CFBADD);
// given the data cache size, this is probably
// faster than cleaning by address
SCB_CleanDCache();

LTDC_Layer1->CFBAR = (uint32_t)buffer;

// reload shadow registers on vertical blank
_frame_addr_reloaded = 0;
LTDC->SRCR = LTDC_SRCR_VBR;

__HAL_LTDC_ENABLE_IT(&hltdc, LTDC_IT_LI);

// wait for reload
Expand Down