From 8c372521738ff98b333e98e121c0813731feb4dc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tom=C3=A1=C5=A1=20Ju=C5=99ena?= Date: Thu, 10 Jul 2025 17:15:58 +0200 Subject: [PATCH 1/3] include: zephyr: dt-bindings: clock: Add HSI48 support STM32C071 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit STM32C071 have USB peripheral which can be clocked from HSI (HSIUSB48). Signed-off-by: Tomáš Juřena --- include/zephyr/dt-bindings/clock/stm32c0_clock.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/zephyr/dt-bindings/clock/stm32c0_clock.h b/include/zephyr/dt-bindings/clock/stm32c0_clock.h index 2489c48f1e93..e76ac3d81901 100644 --- a/include/zephyr/dt-bindings/clock/stm32c0_clock.h +++ b/include/zephyr/dt-bindings/clock/stm32c0_clock.h @@ -24,8 +24,11 @@ /* defined in stm32_common_clocks.h */ /** Fixed clocks */ /* Low speed clocks defined in stm32_common_clocks.h */ +/* STM32_SRC_HSI relates to HSI48 clock mentioned in RM0490 Reference Manual */ #define STM32_SRC_HSI (STM32_SRC_LSI + 1) -#define STM32_SRC_HSE (STM32_SRC_HSI + 1) +/* STM32_SRC_HSI48 relates to HSIUSB48 mentioned in RM0490 Reference Manual */ +#define STM32_SRC_HSI48 (STM32_SRC_HSI + 1) +#define STM32_SRC_HSE (STM32_SRC_HSI48 + 1) /** Peripheral bus clock */ #define STM32_SRC_PCLK (STM32_SRC_HSE + 1) From 0a038f465cdd094663a3d3d4c2c5dee1b3d62de0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tom=C3=A1=C5=A1=20Ju=C5=99ena?= Date: Fri, 11 Jul 2025 09:21:23 +0200 Subject: [PATCH 2/3] dts: arm: st: c0: Add clk-hsi48 for stm32c071 SOC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow to use internal HSI to clock the USB bus if HSE is not available. Signed-off-by: Tomáš Juřena --- dts/arm/st/c0/stm32c071.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/dts/arm/st/c0/stm32c071.dtsi b/dts/arm/st/c0/stm32c071.dtsi index 00cbbb6a118a..6e4ea66b788a 100644 --- a/dts/arm/st/c0/stm32c071.dtsi +++ b/dts/arm/st/c0/stm32c071.dtsi @@ -7,6 +7,15 @@ #include / { + clocks { + clk_hsi48: clk-hsi48 { + #clock-cells = <0>; + compatible = "st,stm32-hsi48-clock"; + clock-frequency = ; + status = "disabled"; + }; + }; + soc { compatible = "st,stm32c071", "st,stm32c0", "simple-bus"; From 08eafba59f470f68c67350a52896e92ff89ea9ad Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tom=C3=A1=C5=A1=20Ju=C5=99ena?= Date: Fri, 11 Jul 2025 09:22:13 +0200 Subject: [PATCH 3/3] boards: st: nucleo_c071rb: enables HSIUSB48 clock for USB MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enables the HSIUSB48 clock (node clk_hsi48 in the SoC DTSI) on the nucleo_c071rb platform. Signed-off-by: Tomáš Juřena --- boards/st/nucleo_c071rb/nucleo_c071rb.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/boards/st/nucleo_c071rb/nucleo_c071rb.dts b/boards/st/nucleo_c071rb/nucleo_c071rb.dts index 53f72085ba59..c6faae2b770d 100644 --- a/boards/st/nucleo_c071rb/nucleo_c071rb.dts +++ b/boards/st/nucleo_c071rb/nucleo_c071rb.dts @@ -78,6 +78,11 @@ status = "okay"; }; +&clk_hsi48 { + status = "okay"; + crs-usb-sof; +}; + &rcc { clocks = <&clk_hse>; clock-frequency = ;