From 0393f0c01fca888e8416310e7bab58528818129f Mon Sep 17 00:00:00 2001 From: Quang Le Date: Mon, 7 Jul 2025 16:56:39 +0700 Subject: [PATCH 1/4] manifest: Update commit id for hal_renesas Update commit id for hal_renesas Signed-off-by: Quang Le Signed-off-by: Tien Nguyen --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index fe8253bfa2f22..2c62d581d65a6 100644 --- a/west.yml +++ b/west.yml @@ -226,7 +226,7 @@ manifest: - hal - name: hal_renesas path: modules/hal/renesas - revision: 0769fe1520f6c14e6301188588da758a609f181d + revision: pull/117/head groups: - hal - name: hal_rpi_pico From 753cb23c9d28a29ddd07ce6d359bf408aecb1fe6 Mon Sep 17 00:00:00 2001 From: Quang Le Date: Mon, 7 Jul 2025 16:57:45 +0700 Subject: [PATCH 2/4] drivers: intc: Add external interrupt support for Renesas RZ/A3UL, V2L Add external interrupt support for Renesas RZ/A3UL, V2L Signed-off-by: Quang Le Signed-off-by: Tien Nguyen --- .../interrupt_controller/Kconfig.renesas_rz | 11 +++ .../intc_renesas_rz_ext_irq.c | 82 +++++++++++-------- .../interrupt-controller/renesas,rz-icu.yaml | 11 +++ .../interrupt-controller/renesas,rz-intc.yaml | 11 +++ 4 files changed, 80 insertions(+), 35 deletions(-) create mode 100644 dts/bindings/interrupt-controller/renesas,rz-icu.yaml create mode 100644 dts/bindings/interrupt-controller/renesas,rz-intc.yaml diff --git a/drivers/interrupt_controller/Kconfig.renesas_rz b/drivers/interrupt_controller/Kconfig.renesas_rz index 6fe45f73788a6..9b13bd03df0be 100644 --- a/drivers/interrupt_controller/Kconfig.renesas_rz +++ b/drivers/interrupt_controller/Kconfig.renesas_rz @@ -9,3 +9,14 @@ config RENESAS_RZ_EXT_IRQ select PINCTRL help Renesas RZ external interrupt controller driver + +if RENESAS_RZ_EXT_IRQ + +config RENESAS_RZ_INTC_HAS_NMI + bool "NMI (Non Maskable Interrupt) pin" + default y + depends on SOC_SERIES_RZG3S || SOC_SERIES_RZA3UL + help + Renesas RZ interrupt controller has NMI (Non Maskable Interrupt) pin + +endif diff --git a/drivers/interrupt_controller/intc_renesas_rz_ext_irq.c b/drivers/interrupt_controller/intc_renesas_rz_ext_irq.c index a6358e0734548..f261cf354fb9f 100644 --- a/drivers/interrupt_controller/intc_renesas_rz_ext_irq.c +++ b/drivers/interrupt_controller/intc_renesas_rz_ext_irq.c @@ -12,13 +12,17 @@ #include #include #include -#if defined(CONFIG_SOC_SERIES_RZG3S) -#include -#include -#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) || \ - defined(CONFIG_SOC_SERIES_RZT2M) -#include -#endif /* CONFIG_SOC_SERIES_* */ + +#if CONFIG_DT_HAS_RENESAS_RZ_INTC_ENABLED +#include "r_intc_irq.h" +#elif CONFIG_DT_HAS_RENESAS_RZ_ICU_ENABLED +#include "r_icu.h" +#endif + +#if CONFIG_RENESAS_RZ_INTC_HAS_NMI +#include "r_intc_nmi.h" +#endif + #include #include @@ -37,13 +41,14 @@ struct intc_rz_ext_irq_data { }; /* FSP interruption handlers. */ -#if defined(CONFIG_SOC_SERIES_RZG3S) -void r_intc_irq_isr(void); -void r_intc_nmi_isr(void); -#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) || \ - defined(CONFIG_SOC_SERIES_RZT2M) -void r_icu_isr(void); -#endif /* CONFIG_SOC_SERIES_* */ +#if CONFIG_DT_HAS_RENESAS_RZ_INTC_ENABLED +void r_intc_irq_isr(void *irq); +void r_intc_nmi_isr(void *irq); +#define INTC_IRQ_ISR r_intc_irq_isr +#elif CONFIG_DT_HAS_RENESAS_RZ_ICU_ENABLED +void r_icu_isr(void *irq); +#define INTC_IRQ_ISR r_icu_isr +#endif int intc_rz_ext_irq_enable(const struct device *dev) { @@ -143,19 +148,25 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args) } } +static void intc_rz_ext_irq_isr_handle(const struct device *dev) +{ + const struct intc_rz_ext_irq_config *config = dev->config; + + INTC_IRQ_ISR((void *)config->fsp_cfg->irq); +} + #ifdef CONFIG_CPU_CORTEX_M #define GET_IRQ_FLAGS(index) 0 #else /* Cortex-A/R */ #define GET_IRQ_FLAGS(index) DT_INST_IRQ_BY_IDX(index, 0, flags) #endif -#define EXT_IRQ_RZ_IRQ_CONNECT(index, isr, isr_nmi) \ +#define EXT_IRQ_RZ_IRQ_CONNECT(index, isr) \ IRQ_CONNECT(DT_INST_IRQ_BY_IDX(index, 0, irq), DT_INST_IRQ_BY_IDX(index, 0, priority), \ - COND_CODE_0(DT_INST_IRQ_BY_IDX(index, 0, irq), \ - (isr_nmi), (isr)), NULL, GET_IRQ_FLAGS(index)); + isr, DEVICE_DT_INST_GET(index), GET_IRQ_FLAGS(index)) -#define INTC_RZG_EXT_IRQ_INIT(index) \ - static const external_irq_cfg_t g_external_irq##index##_cfg = { \ +#define INTC_RZ_EXT_IRQ_INIT(index) \ + static external_irq_cfg_t g_external_irq##index##_cfg = { \ .trigger = DT_INST_ENUM_IDX_OR(index, trigger_type, 0), \ .filter_enable = true, \ .clock_source_div = EXTERNAL_IRQ_CLOCK_SOURCE_DIV_1, \ @@ -164,9 +175,9 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args) .p_extend = NULL, \ .ipl = DT_INST_IRQ_BY_IDX(index, 0, priority), \ .irq = DT_INST_IRQ_BY_IDX(index, 0, irq), \ - COND_CODE_0(DT_INST_IRQ_BY_IDX(index, 0, irq), \ - (.channel = DT_INST_IRQ_BY_IDX(index, 0, irq)), \ - (.channel = DT_INST_IRQ_BY_IDX(index, 0, irq) - 1)), \ + COND_CODE_0(DT_NUM_REGS(DT_DRV_INST(index)), ( \ + .channel = 0), ( \ + .channel = (DT_INST_REG_ADDR(index)))), \ }; \ \ PINCTRL_DT_INST_DEFINE(index); \ @@ -174,12 +185,12 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args) struct intc_rz_ext_irq_config intc_rz_ext_irq_config##index = { \ .pin_config = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \ .fsp_cfg = (external_irq_cfg_t *)&g_external_irq##index##_cfg, \ - COND_CODE_0(DT_INST_IRQ_BY_IDX(index, 0, irq), ( \ - .fsp_api = &g_external_irq_on_intc_nmi), ( \ - .fsp_api = &g_external_irq_on_intc_irq)), \ + COND_CODE_0(DT_NUM_REGS(DT_DRV_INST(index)), ( \ + .fsp_api = &g_external_irq_on_intc_nmi), ( \ + .fsp_api = &g_external_irq_on_intc_irq)), \ }; \ \ - COND_CODE_0(DT_INST_IRQ_BY_IDX(index, 0, irq), \ + COND_CODE_0(DT_NUM_REGS(DT_DRV_INST(index)), \ (static intc_nmi_instance_ctrl_t g_external_irq##index##_ctrl;), \ (static intc_irq_instance_ctrl_t g_external_irq##index##_ctrl;)) \ \ @@ -189,7 +200,9 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args) \ static int intc_rz_ext_irq_init_##index(const struct device *dev) \ { \ - EXT_IRQ_RZ_IRQ_CONNECT(index, r_intc_irq_isr, r_intc_nmi_isr) \ + COND_CODE_0(DT_NUM_REGS(DT_DRV_INST(index)), ( \ + EXT_IRQ_RZ_IRQ_CONNECT(index, r_intc_nmi_isr);), ( \ + EXT_IRQ_RZ_IRQ_CONNECT(index, intc_rz_ext_irq_isr_handle);)) \ return intc_rz_ext_irq_init(dev); \ }; \ \ @@ -197,8 +210,8 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args) &intc_rz_ext_irq_data##index, &intc_rz_ext_irq_config##index, \ PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY, NULL); -#define INTC_RZTN_EXT_IRQ_INIT(index) \ - static const external_irq_cfg_t g_external_irq##index##_cfg = { \ +#define INTC_RZ_ICU_EXT_IRQ_INIT(index) \ + static external_irq_cfg_t g_external_irq##index##_cfg = { \ .trigger = DT_INST_ENUM_IDX_OR(index, trigger_type, 0), \ .filter_enable = true, \ .clock_source_div = EXTERNAL_IRQ_CLOCK_SOURCE_DIV_1, \ @@ -226,7 +239,7 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args) \ static int intc_rz_ext_irq_init_##index(const struct device *dev) \ { \ - EXT_IRQ_RZ_IRQ_CONNECT(index, r_icu_isr, NULL); \ + EXT_IRQ_RZ_IRQ_CONNECT(index, intc_rz_ext_irq_isr_handle); \ return intc_rz_ext_irq_init(dev); \ }; \ \ @@ -234,9 +247,8 @@ static void intc_rz_ext_irq_callback(external_irq_callback_args_t *args) &intc_rz_ext_irq_data##index, &intc_rz_ext_irq_config##index, \ PRE_KERNEL_1, CONFIG_INTC_INIT_PRIORITY, NULL); -#if defined(CONFIG_SOC_SERIES_RZG3S) -DT_INST_FOREACH_STATUS_OKAY(INTC_RZG_EXT_IRQ_INIT) -#elif defined(CONFIG_SOC_SERIES_RZN2L) || defined(CONFIG_SOC_SERIES_RZT2L) || \ - defined(CONFIG_SOC_SERIES_RZT2M) -DT_INST_FOREACH_STATUS_OKAY(INTC_RZTN_EXT_IRQ_INIT) +#if CONFIG_DT_HAS_RENESAS_RZ_INTC_ENABLED +DT_INST_FOREACH_STATUS_OKAY(INTC_RZ_EXT_IRQ_INIT) +#elif CONFIG_DT_HAS_RENESAS_RZ_ICU_ENABLED +DT_INST_FOREACH_STATUS_OKAY(INTC_RZ_ICU_EXT_IRQ_INIT) #endif diff --git a/dts/bindings/interrupt-controller/renesas,rz-icu.yaml b/dts/bindings/interrupt-controller/renesas,rz-icu.yaml new file mode 100644 index 0000000000000..1bd5f44ac53d8 --- /dev/null +++ b/dts/bindings/interrupt-controller/renesas,rz-icu.yaml @@ -0,0 +1,11 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +description: Renesas RZ Interrupt Controller (ICU) +compatible: "renesas,rz-icu" + +include: base.yaml + +properties: + reg: + required: true diff --git a/dts/bindings/interrupt-controller/renesas,rz-intc.yaml b/dts/bindings/interrupt-controller/renesas,rz-intc.yaml new file mode 100644 index 0000000000000..9505c8001843b --- /dev/null +++ b/dts/bindings/interrupt-controller/renesas,rz-intc.yaml @@ -0,0 +1,11 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +description: Renesas RZ Interrupt Controller +compatible: "renesas,rz-intc" + +include: base.yaml + +properties: + reg: + required: true From 807257efceb5b374ac78c9122e77065f2cebde7f Mon Sep 17 00:00:00 2001 From: Quang Le Date: Mon, 7 Jul 2025 16:59:10 +0700 Subject: [PATCH 3/4] dts: renesas: Update interrupt nodes for Renesas RZ/G3S, N2L, T2M, T2L - Change node's name, node's register size, node's address cells of intc node for Renesas RZ/G3S - Add `renesas, rz-intc` compatible and #size-cells of 0 to intc node of Renesas RZ/G3S - Add `reg` property to irq nodes for Renesas RZ/G3S - Add `renesas, rz-icu` compatible for Renesas RZ/N2L, T2M, T2L Signed-off-by: Quang Le Signed-off-by: Tien Nguyen --- dts/arm/renesas/rz/rzg/r9a08g045.dtsi | 39 +++++++++++++++++++-------- dts/arm/renesas/rz/rzn/r9a07g084.dtsi | 1 + dts/arm/renesas/rz/rzt/r9a07g074.dtsi | 1 + dts/arm/renesas/rz/rzt/r9a07g075.dtsi | 1 + 4 files changed, 31 insertions(+), 11 deletions(-) diff --git a/dts/arm/renesas/rz/rzg/r9a08g045.dtsi b/dts/arm/renesas/rz/rzg/r9a08g045.dtsi index 6e1c33ba37592..af0282dfd3b59 100644 --- a/dts/arm/renesas/rz/rzg/r9a08g045.dtsi +++ b/dts/arm/renesas/rz/rzg/r9a08g045.dtsi @@ -832,9 +832,11 @@ }; }; - intc: interrupt-controller@41060000 { - reg = <0x41060000 0x18>; - #address-cells = <0>; + intc: intc@41060000 { + compatible = "renesas,rz-intc"; + reg = <0x41060000 DT_SIZE_K(64)>; + #address-cells = <1>; + #size-cells = <0>; interrupt-parent = <&nvic>; nmi: nmi { @@ -845,57 +847,72 @@ status = "disabled"; }; - irq0: irq0 { + irq0: irq@0 { compatible = "renesas,rz-ext-irq"; + reg = <0x0>; interrupt-controller; #interrupt-cells = <2>; interrupts = <1 1>; status = "disabled"; }; - irq1: irq1 { + + irq1: irq@1 { compatible = "renesas,rz-ext-irq"; + reg = <0x1>; interrupt-controller; #interrupt-cells = <2>; interrupts = <2 1>; status = "disabled"; }; - irq2: irq2 { + + irq2: irq@2 { compatible = "renesas,rz-ext-irq"; + reg = <0x2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <3 1>; status = "disabled"; }; - irq3: irq3 { + + irq3: irq@3 { compatible = "renesas,rz-ext-irq"; + reg = <0x3>; interrupt-controller; #interrupt-cells = <2>; interrupts = <4 1>; status = "disabled"; }; - irq4: irq4 { + + irq4: irq@4 { compatible = "renesas,rz-ext-irq"; + reg = <0x4>; interrupt-controller; #interrupt-cells = <2>; interrupts = <5 1>; status = "disabled"; }; - irq5: irq5 { + + irq5: irq@5 { compatible = "renesas,rz-ext-irq"; + reg = <0x5>; interrupt-controller; #interrupt-cells = <2>; interrupts = <6 1>; status = "disabled"; }; - irq6: irq6 { + + irq6: irq@6 { compatible = "renesas,rz-ext-irq"; + reg = <0x6>; interrupt-controller; #interrupt-cells = <2>; interrupts = <7 1>; status = "disabled"; }; - irq7: irq7 { + + irq7: irq@7 { compatible = "renesas,rz-ext-irq"; + reg = <0x7>; interrupt-controller; #interrupt-cells = <2>; interrupts = <8 1>; diff --git a/dts/arm/renesas/rz/rzn/r9a07g084.dtsi b/dts/arm/renesas/rz/rzn/r9a07g084.dtsi index 91330455337de..714a36f3ff30a 100644 --- a/dts/arm/renesas/rz/rzn/r9a07g084.dtsi +++ b/dts/arm/renesas/rz/rzn/r9a07g084.dtsi @@ -89,6 +89,7 @@ }; icu: icu@81048000 { + compatible = "renesas,rz-icu"; reg = <0x81048000 0x1000>; interrupt-parent = <&gic>; #address-cells = <1>; diff --git a/dts/arm/renesas/rz/rzt/r9a07g074.dtsi b/dts/arm/renesas/rz/rzt/r9a07g074.dtsi index 33c52551c5f60..e5a9c57f43b50 100644 --- a/dts/arm/renesas/rz/rzt/r9a07g074.dtsi +++ b/dts/arm/renesas/rz/rzt/r9a07g074.dtsi @@ -90,6 +90,7 @@ }; icu: icu@81048000 { + compatible = "renesas,rz-icu"; reg = <0x81048000 0x1000>; interrupt-parent = <&gic>; #address-cells = <1>; diff --git a/dts/arm/renesas/rz/rzt/r9a07g075.dtsi b/dts/arm/renesas/rz/rzt/r9a07g075.dtsi index 209238629d0d5..b9b812eee03af 100644 --- a/dts/arm/renesas/rz/rzt/r9a07g075.dtsi +++ b/dts/arm/renesas/rz/rzt/r9a07g075.dtsi @@ -96,6 +96,7 @@ }; icu: icu@81048000 { + compatible = "renesas,rz-icu"; reg = <0x81048000 0x1000>; interrupt-parent = <&gic>; #address-cells = <1>; From 711b62b57bca09a59ef15237c4048c6aa626287c Mon Sep 17 00:00:00 2001 From: Quang Le Date: Mon, 7 Jul 2025 17:04:14 +0700 Subject: [PATCH 4/4] dts: renesas: Add external interrupt support for Renesas RZ/A3UL, V2L Add external interrupt nodes to Renesas RZ/A3UL, V2L Signed-off-by: Quang Le Signed-off-by: Tien Nguyen --- dts/arm/renesas/rz/rzv/r9a07g054.dtsi | 80 ++++++++++++++++++++++ dts/arm64/renesas/rz/rza/r9a07g063.dtsi | 88 +++++++++++++++++++++++++ 2 files changed, 168 insertions(+) diff --git a/dts/arm/renesas/rz/rzv/r9a07g054.dtsi b/dts/arm/renesas/rz/rzv/r9a07g054.dtsi index fc98bcf74f8d7..350d95c94c91c 100644 --- a/dts/arm/renesas/rz/rzv/r9a07g054.dtsi +++ b/dts/arm/renesas/rz/rzv/r9a07g054.dtsi @@ -539,6 +539,86 @@ interrupt-names = "eri", "bri", "rxi", "txi", "tei"; status = "disabled"; }; + + intc: intc@410b0000 { + compatible = "renesas,rz-intc"; + reg = <0x410b0000 DT_SIZE_K(64)>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&nvic>; + + irq0: irq@0 { + compatible = "renesas,rz-ext-irq"; + reg = <0x0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <1 1>; + status = "disabled"; + }; + + irq1: irq@1 { + compatible = "renesas,rz-ext-irq"; + reg = <0x1>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <2 1>; + status = "disabled"; + }; + + irq2: irq@2 { + compatible = "renesas,rz-ext-irq"; + reg = <0x2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <3 1>; + status = "disabled"; + }; + + irq3: irq@3 { + compatible = "renesas,rz-ext-irq"; + reg = <0x3>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <4 1>; + status = "disabled"; + }; + + irq4: irq@4 { + compatible = "renesas,rz-ext-irq"; + reg = <0x4>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <5 1>; + status = "disabled"; + }; + + irq5: irq@5 { + compatible = "renesas,rz-ext-irq"; + reg = <0x5>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <6 1>; + status = "disabled"; + }; + + irq6: irq@6 { + compatible = "renesas,rz-ext-irq"; + reg = <0x6>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <7 1>; + status = "disabled"; + }; + + irq7: irq@7 { + compatible = "renesas,rz-ext-irq"; + reg = <0x7>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <8 1>; + status = "disabled"; + }; + }; }; }; diff --git a/dts/arm64/renesas/rz/rza/r9a07g063.dtsi b/dts/arm64/renesas/rz/rza/r9a07g063.dtsi index fd75543def8e8..b0de51bb5a705 100644 --- a/dts/arm64/renesas/rz/rza/r9a07g063.dtsi +++ b/dts/arm64/renesas/rz/rza/r9a07g063.dtsi @@ -329,5 +329,93 @@ interrupt-names = "eri", "bri", "rxi", "txi", "tei"; status = "disabled"; }; + + intc: intc@110a0000 { + compatible = "renesas,rz-intc"; + reg = <0x110a0000 DT_SIZE_K(64)>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&gic>; + + nmi: nmi { + compatible = "renesas,rz-ext-irq"; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + + irq0: irq@0 { + compatible = "renesas,rz-ext-irq"; + reg = <0x0>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + + irq1: irq@1 { + compatible = "renesas,rz-ext-irq"; + reg = <0x1>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + + irq2: irq@2 { + compatible = "renesas,rz-ext-irq"; + reg = <0x2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + + irq3: irq@3 { + compatible = "renesas,rz-ext-irq"; + reg = <0x3>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + + irq4: irq@4 { + compatible = "renesas,rz-ext-irq"; + reg = <0x4>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + + irq5: irq@5 { + compatible = "renesas,rz-ext-irq"; + reg = <0x5>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + + irq6: irq@6 { + compatible = "renesas,rz-ext-irq"; + reg = <0x6>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + + irq7: irq@7 { + compatible = "renesas,rz-ext-irq"; + reg = <0x7>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + status = "disabled"; + }; + }; }; };