diff --git a/boards/renesas/rza3ul_smarc/rza3ul_smarc.dts b/boards/renesas/rza3ul_smarc/rza3ul_smarc.dts index c3c0be4c817e0..482388639d142 100644 --- a/boards/renesas/rza3ul_smarc/rza3ul_smarc.dts +++ b/boards/renesas/rza3ul_smarc/rza3ul_smarc.dts @@ -67,3 +67,7 @@ pinctrl-names = "default"; status = "okay"; }; + +&adc { + status = "okay"; +}; diff --git a/boards/renesas/rza3ul_smarc/rza3ul_smarc.yaml b/boards/renesas/rza3ul_smarc/rza3ul_smarc.yaml index 2e7f9d53356ed..2013c97e89cbe 100644 --- a/boards/renesas/rza3ul_smarc/rza3ul_smarc.yaml +++ b/boards/renesas/rza3ul_smarc/rza3ul_smarc.yaml @@ -8,6 +8,7 @@ toolchain: supported: - uart - gpio + - adc testing: ignore_tags: - bluetooth diff --git a/boards/renesas/rzn2l_rsk/rzn2l_rsk.dts b/boards/renesas/rzn2l_rsk/rzn2l_rsk.dts index 9ba2003c646bf..3ee0fcb284eb5 100644 --- a/boards/renesas/rzn2l_rsk/rzn2l_rsk.dts +++ b/boards/renesas/rzn2l_rsk/rzn2l_rsk.dts @@ -109,3 +109,11 @@ &gpio5 { status = "okay"; }; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; diff --git a/boards/renesas/rzn2l_rsk/rzn2l_rsk.yaml b/boards/renesas/rzn2l_rsk/rzn2l_rsk.yaml index 196b812a193da..6c1e3901bd34e 100644 --- a/boards/renesas/rzn2l_rsk/rzn2l_rsk.yaml +++ b/boards/renesas/rzn2l_rsk/rzn2l_rsk.yaml @@ -7,4 +7,5 @@ toolchain: supported: - uart - gpio + - adc vendor: renesas diff --git a/boards/renesas/rzt2m_rsk/rzt2m_rsk_r9a07g075m24gbg_cr520.dts b/boards/renesas/rzt2m_rsk/rzt2m_rsk_r9a07g075m24gbg_cr520.dts index 18e5b7ddf905b..e8713e5c9f161 100644 --- a/boards/renesas/rzt2m_rsk/rzt2m_rsk_r9a07g075m24gbg_cr520.dts +++ b/boards/renesas/rzt2m_rsk/rzt2m_rsk_r9a07g075m24gbg_cr520.dts @@ -106,3 +106,11 @@ &gpio23 { status = "okay"; }; + +&adc0 { + status = "okay"; +}; + +&adc1 { + status = "okay"; +}; diff --git a/boards/renesas/rzt2m_rsk/rzt2m_rsk_r9a07g075m24gbg_cr520.yaml b/boards/renesas/rzt2m_rsk/rzt2m_rsk_r9a07g075m24gbg_cr520.yaml index 2fbd50880f02a..14f9208c4260d 100644 --- a/boards/renesas/rzt2m_rsk/rzt2m_rsk_r9a07g075m24gbg_cr520.yaml +++ b/boards/renesas/rzt2m_rsk/rzt2m_rsk_r9a07g075m24gbg_cr520.yaml @@ -12,4 +12,5 @@ toolchain: supported: - uart - gpio + - adc vendor: renesas diff --git a/boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.dts b/boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.dts index 28b3f8dcfdc09..51e4a2cb74bcd 100644 --- a/boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.dts +++ b/boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.dts @@ -33,3 +33,7 @@ pinctrl-names = "default"; status = "okay"; }; + +&adc { + status = "okay"; +}; diff --git a/boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.yaml b/boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.yaml index e3d17a6daf5ae..d76cf7cc1a853 100644 --- a/boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.yaml +++ b/boards/renesas/rzv2l_smarc/rzv2l_smarc_r9a07g054l23gbg_cm33.yaml @@ -8,4 +8,5 @@ toolchain: supported: - uart - gpio + - adc vendor: renesas diff --git a/drivers/adc/CMakeLists.txt b/drivers/adc/CMakeLists.txt index 571318ac56d39..44b0f82107e8f 100644 --- a/drivers/adc/CMakeLists.txt +++ b/drivers/adc/CMakeLists.txt @@ -61,6 +61,7 @@ zephyr_library_sources_ifdef(CONFIG_ADC_MCUX_GAU adc_mcux_gau_adc.c) zephyr_library_sources_ifdef(CONFIG_ADC_AMBIQ adc_ambiq.c) zephyr_library_sources_ifdef(CONFIG_ADC_RENESAS_RA adc_renesas_ra.c) zephyr_library_sources_ifdef(CONFIG_ADC_RENESAS_RZ adc_renesas_rz.c) +zephyr_library_sources_ifdef(CONFIG_ADC_RENESAS_RZ_ADC_C adc_renesas_rz.c) zephyr_library_sources_ifdef(CONFIG_ADC_MAX32 adc_max32.c) zephyr_library_sources_ifdef(CONFIG_ADC_AD4114 adc_ad4114.c) zephyr_library_sources_ifdef(CONFIG_ADC_AD7124 adc_ad7124.c) diff --git a/drivers/adc/Kconfig.renesas_rz b/drivers/adc/Kconfig.renesas_rz index 75146acf6d5f1..a2840ca7d6e2b 100644 --- a/drivers/adc/Kconfig.renesas_rz +++ b/drivers/adc/Kconfig.renesas_rz @@ -1,6 +1,6 @@ # Renesas RZ Family -# Copyright (c) 2024 Renesas Electronics Corporation +# Copyright (c) 2024-2025 Renesas Electronics Corporation # SPDX-License-Identifier: Apache-2.0 config ADC_RENESAS_RZ @@ -10,3 +10,11 @@ config ADC_RENESAS_RZ select USE_RZ_FSP_ADC help Enable the RZ ADC driver. + +config ADC_RENESAS_RZ_ADC_C + bool "Renesas RZ ADC-C Driver" + default y + depends on DT_HAS_RENESAS_RZ_ADC_C_ENABLED + select USE_RZ_FSP_ADC + help + Enable the RZ ADC-C driver. diff --git a/drivers/adc/adc_renesas_rz.c b/drivers/adc/adc_renesas_rz.c index 23f005b3ab4c5..7690826989dfd 100644 --- a/drivers/adc/adc_renesas_rz.c +++ b/drivers/adc/adc_renesas_rz.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2024 Renesas Electronics Corporation + * Copyright (c) 2024-2025 Renesas Electronics Corporation * SPDX-License-Identifier: Apache-2.0 */ @@ -8,16 +8,27 @@ #include #include #include -#include "r_adc_c.h" +#include -LOG_MODULE_REGISTER(adc_renesas_rz, CONFIG_ADC_LOG_LEVEL); +#if defined(CONFIG_ADC_RENESAS_RZ_ADC_C) +#include "r_adc_c.h" +typedef adc_c_channel_cfg_t adc_channel_cfg_t; +typedef adc_c_instance_ctrl_t adc_instance_ctrl_t; +typedef adc_c_extended_cfg_t adc_extended_cfg_t; +void adc_c_scan_end_isr(void *irq); +#define ADC_SCAN_END_ISR adc_c_scan_end_isr +#else /* CONFIG_ADC_RENESAS_RZ */ +#include "r_adc.h" +void adc_scan_end_isr(void *irq); +#define ADC_SCAN_END_ISR adc_scan_end_isr +#endif #define ADC_CONTEXT_USES_KERNEL_TIMER #include "adc_context.h" #define ADC_RZ_MAX_RESOLUTION 12 -void adc_c_scan_end_isr(void); +LOG_MODULE_REGISTER(adc_renesas_rz, CONFIG_ADC_LOG_LEVEL); /** * @brief RZ ADC config @@ -42,11 +53,11 @@ struct adc_rz_data { /** Pointer to RZ ADC own device structure */ const struct device *dev; /** Structure that handle fsp ADC */ - adc_c_instance_ctrl_t fsp_ctrl; + adc_instance_ctrl_t fsp_ctrl; /** Structure that handle fsp ADC config */ struct st_adc_cfg fsp_cfg; /** Structure that handle fsp ADC channel config */ - adc_c_channel_cfg_t fsp_channel_cfg; + adc_channel_cfg_t fsp_channel_cfg; /** Pointer to memory where next sample will be written */ uint16_t *buf; /** Mask with channels that will be sampled */ @@ -133,7 +144,7 @@ static void adc_rz_isr(const struct device *dev) } channels = channels >> 1; } - adc_c_scan_end_isr(); + ADC_SCAN_END_ISR((void *)data->fsp_cfg.scan_end_irq); adc_context_on_sampling_done(&data->ctx, dev); } @@ -303,18 +314,9 @@ static int adc_rz_init(const struct device *dev) * ************************* DRIVER REGISTER SECTION *************************** */ -#define ADC_RZG_IRQ_CONNECT(idx, irq_name, isr) \ - do { \ - IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, irq_name, irq), \ - DT_INST_IRQ_BY_NAME(idx, irq_name, priority), isr, \ - DEVICE_DT_INST_GET(idx), 0); \ - irq_enable(DT_INST_IRQ_BY_NAME(idx, irq_name, irq)); \ - } while (0) - -#define ADC_RZG_CONFIG_FUNC(idx) ADC_RZG_IRQ_CONNECT(idx, scanend, adc_rz_isr); - -#define ADC_RZG_INIT(idx) \ - static const adc_c_extended_cfg_t g_adc##idx##_cfg_extend = { \ +#if defined(CONFIG_ADC_RENESAS_RZ_ADC_C) +#define ADC_RZ_EXTENDED_FSP_CFG(idx) \ + static const adc_extended_cfg_t g_adc##idx##_cfg_extend = { \ .trigger_mode = ADC_C_TRIGGER_MODE_SOFTWARE, \ .trigger_source = ADC_C_ACTIVE_TRIGGER_EXTERNAL, \ .trigger_edge = ADC_C_TRIGGER_EDGE_FALLING, \ @@ -324,43 +326,123 @@ static int adc_rz_init(const struct device *dev) .sampling_time = 100, \ .external_trigger_filter = ADC_C_FILTER_STAGE_SETTING_DISABLE, \ }; \ + static const struct adc_rz_config adc_rz_config_##idx = { \ + .channel_available_mask = DT_INST_PROP(idx, channel_available_mask), \ + .fsp_api = &g_adc_on_adc_c, \ + }; + +#define ADC_RZ_FSP_CFG(idx) \ + .fsp_cfg = \ + { \ + .mode = ADC_MODE_SINGLE_SCAN, \ + .p_callback = NULL, \ + .p_context = NULL, \ + .p_extend = &g_adc##idx##_cfg_extend, \ + .scan_end_irq = DT_INST_IRQ_BY_NAME(idx, scanend, irq), \ + .scan_end_ipl = DT_INST_IRQ_BY_NAME(idx, scanend, priority), \ + }, \ + .fsp_channel_cfg = { \ + .scan_mask = 0, \ + .interrupt_setting = ADC_C_INTERRUPT_CHANNEL_SETTING_ENABLE, \ + } + +#endif /* CONFIG_ADC_RENESAS_RZ_ADC_C */ + +#if defined(CONFIG_ADC_RENESAS_RZ) +#define ADC_RZ_EXTENDED_FSP_CFG(idx) \ + static const adc_extended_cfg_t g_adc##idx##_cfg_extend = { \ + .add_average_count = ADC_ADD_OFF, \ + .clearing = ADC_CLEAR_AFTER_READ_ON, \ + .trigger_group_b = ADC_TRIGGER_SYNC_ELC, \ + .double_trigger_mode = ADC_DOUBLE_TRIGGER_DISABLED, \ + .adc_start_trigger_a = ADC_ACTIVE_TRIGGER_DISABLED, \ + .adc_start_trigger_b = ADC_ACTIVE_TRIGGER_DISABLED, \ + .adc_start_trigger_c_enabled = 0, \ + .adc_start_trigger_c = ADC_ACTIVE_TRIGGER_DISABLED, \ + .adc_elc_ctrl = ADC_ELC_SINGLE_SCAN, \ + .window_a_irq = FSP_INVALID_VECTOR, \ + .window_a_ipl = BSP_IRQ_DISABLED, \ + .window_b_irq = FSP_INVALID_VECTOR, \ + .window_b_ipl = BSP_IRQ_DISABLED, \ + }; \ + static const struct adc_rz_config adc_rz_config_##idx = { \ + .channel_available_mask = DT_INST_PROP(idx, channel_available_mask), \ + .fsp_api = &g_adc_on_adc, \ + }; + +#define ADC_RZ_FSP_CFG(idx) \ + .fsp_cfg = \ + { \ + .unit = DT_INST_PROP(idx, unit), \ + .mode = ADC_MODE_SINGLE_SCAN, \ + .resolution = ADC_RESOLUTION_12_BIT, \ + .alignment = (adc_alignment_t)ADC_ALIGNMENT_RIGHT, \ + .trigger = ADC_TRIGGER_SOFTWARE, \ + .p_callback = NULL, \ + .p_context = NULL, \ + .p_extend = &g_adc##idx##_cfg_extend, \ + .scan_end_irq = DT_INST_IRQ_BY_NAME(idx, scanend, irq), \ + .scan_end_ipl = DT_INST_IRQ_BY_NAME(idx, scanend, priority), \ + .scan_end_b_irq = FSP_INVALID_VECTOR, \ + .scan_end_b_ipl = BSP_IRQ_DISABLED, \ + .scan_end_c_irq = FSP_INVALID_VECTOR, \ + .scan_end_c_ipl = BSP_IRQ_DISABLED, \ + }, \ + .fsp_channel_cfg = { \ + .scan_mask = 0, \ + .scan_mask_group_b = 0, \ + .priority_group_a = ADC_GROUP_A_PRIORITY_OFF, \ + .add_mask = 0, \ + .sample_hold_mask = 0, \ + .sample_hold_states = 24, \ + .scan_mask_group_c = 0, \ + } + +#endif /* CONFIG_ADC_RENESAS_RZ */ + +#ifdef CONFIG_CPU_CORTEX_M +#define GET_IRQ_FLAGS(index) 0 +#else /* Cortex-A/R */ +#define GET_IRQ_FLAGS(index) DT_INST_IRQ_BY_IDX(index, 0, flags) +#endif + +#define ADC_RZ_IRQ_CONNECT(idx, irq_name, isr) \ + do { \ + IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, irq_name, irq), \ + DT_INST_IRQ_BY_NAME(idx, irq_name, priority), isr, \ + DEVICE_DT_INST_GET(idx), GET_IRQ_FLAGS(idx)); \ + irq_enable(DT_INST_IRQ_BY_NAME(idx, irq_name, irq)); \ + } while (0) + +#define ADC_RZ_CONFIG_FUNC(idx) ADC_RZ_IRQ_CONNECT(idx, scanend, adc_rz_isr); + +#define ADC_RZ_INIT(idx) \ + ADC_RZ_EXTENDED_FSP_CFG(idx) \ static DEVICE_API(adc, adc_rz_api_##idx) = { \ .channel_setup = adc_rz_channel_setup, \ .read = adc_rz_read, \ .ref_internal = DT_INST_PROP(idx, vref_mv), \ IF_ENABLED(CONFIG_ADC_ASYNC, \ (.read_async = adc_rz_read_async))}; \ - static const struct adc_rz_config adc_rz_config_##idx = { \ - .channel_available_mask = DT_INST_PROP(idx, channel_available_mask), \ - .fsp_api = &g_adc_on_adc, \ - }; \ static struct adc_rz_data adc_rz_data_##idx = { \ ADC_CONTEXT_INIT_TIMER(adc_rz_data_##idx, ctx), \ ADC_CONTEXT_INIT_LOCK(adc_rz_data_##idx, ctx), \ ADC_CONTEXT_INIT_SYNC(adc_rz_data_##idx, ctx), \ .dev = DEVICE_DT_INST_GET(idx), \ - .fsp_cfg = \ - { \ - .mode = ADC_MODE_SINGLE_SCAN, \ - .p_callback = NULL, \ - .p_context = NULL, \ - .p_extend = &g_adc##idx##_cfg_extend, \ - .scan_end_irq = DT_INST_IRQ_BY_NAME(idx, scanend, irq), \ - .scan_end_ipl = DT_INST_IRQ_BY_NAME(idx, scanend, priority), \ - }, \ - .fsp_channel_cfg = \ - { \ - .scan_mask = 0, \ - .interrupt_setting = ADC_C_INTERRUPT_CHANNEL_SETTING_ENABLE, \ - }, \ + ADC_RZ_FSP_CFG(idx), \ }; \ static int adc_rz_init_##idx(const struct device *dev) \ { \ - ADC_RZG_CONFIG_FUNC(idx) \ + ADC_RZ_CONFIG_FUNC(idx) \ return adc_rz_init(dev); \ } \ DEVICE_DT_INST_DEFINE(idx, adc_rz_init_##idx, NULL, &adc_rz_data_##idx, \ &adc_rz_config_##idx, POST_KERNEL, CONFIG_ADC_INIT_PRIORITY, \ &adc_rz_api_##idx) -DT_INST_FOREACH_STATUS_OKAY(ADC_RZG_INIT); +DT_INST_FOREACH_STATUS_OKAY(ADC_RZ_INIT); + +#undef DT_DRV_COMPAT +#define DT_DRV_COMPAT renesas_rz_adc_c + +DT_INST_FOREACH_STATUS_OKAY(ADC_RZ_INIT); diff --git a/dts/arm/renesas/rz/rzg/r9a08g045.dtsi b/dts/arm/renesas/rz/rzg/r9a08g045.dtsi index 6e1c33ba37592..a7bb65cd656da 100644 --- a/dts/arm/renesas/rz/rzg/r9a08g045.dtsi +++ b/dts/arm/renesas/rz/rzg/r9a08g045.dtsi @@ -203,8 +203,8 @@ }; adc: adc@40058000 { - compatible = "renesas,rz-adc"; - reg = <0x40058000 0x80>; + compatible = "renesas,rz-adc-c"; + reg = <0x40058000 DT_SIZE_K(4)>; interrupts = <312 3>; interrupt-names = "scanend"; #io-channel-cells = <1>; diff --git a/dts/arm/renesas/rz/rzn/r9a07g084.dtsi b/dts/arm/renesas/rz/rzn/r9a07g084.dtsi index 91330455337de..ca44055143b9f 100644 --- a/dts/arm/renesas/rz/rzn/r9a07g084.dtsi +++ b/dts/arm/renesas/rz/rzn/r9a07g084.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { #address-cells = <1>; @@ -88,6 +89,30 @@ }; }; + adc0: adc0@90004000 { + compatible = "renesas,rz-adc"; + reg = <0x90004000 0x1000>; + unit = <0>; + interrupts = ; + interrupt-names = "scanend"; + #io-channel-cells = <1>; + vref-mv = <1800>; + channel-available-mask = <0xF>; + status = "disabled"; + }; + + adc1: adc1@80045000 { + compatible = "renesas,rz-adc"; + reg = <0x80045000 0x1000>; + unit = <1>; + interrupts = ; + interrupt-names = "scanend"; + #io-channel-cells = <1>; + vref-mv = <1800>; + channel-available-mask = <0xFF>; + status = "disabled"; + }; + icu: icu@81048000 { reg = <0x81048000 0x1000>; interrupt-parent = <&gic>; diff --git a/dts/arm/renesas/rz/rzt/r9a07g075.dtsi b/dts/arm/renesas/rz/rzt/r9a07g075.dtsi index 209238629d0d5..2addcd48ad27e 100644 --- a/dts/arm/renesas/rz/rzt/r9a07g075.dtsi +++ b/dts/arm/renesas/rz/rzt/r9a07g075.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { compatible = "renesas,r9a07g075"; @@ -95,6 +96,30 @@ }; }; + adc0: adc0@90004000 { + compatible = "renesas,rz-adc"; + reg = <0x90004000 0x1000>; + unit = <0>; + interrupts = ; + interrupt-names = "scanend"; + #io-channel-cells = <1>; + vref-mv = <1800>; + channel-available-mask = <0xFF>; + status = "disabled"; + }; + + adc1: adc1@80045000 { + compatible = "renesas,rz-adc"; + reg = <0x80045000 0x1000>; + unit = <1>; + interrupts = ; + interrupt-names = "scanend"; + #io-channel-cells = <1>; + vref-mv = <1800>; + channel-available-mask = <0xFFFF>; + status = "disabled"; + }; + icu: icu@81048000 { reg = <0x81048000 0x1000>; interrupt-parent = <&gic>; diff --git a/dts/arm/renesas/rz/rzv/r9a07g054.dtsi b/dts/arm/renesas/rz/rzv/r9a07g054.dtsi index fc98bcf74f8d7..968e2db594ee1 100644 --- a/dts/arm/renesas/rz/rzv/r9a07g054.dtsi +++ b/dts/arm/renesas/rz/rzv/r9a07g054.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { compatible = "renesas,r9a07g054"; @@ -32,6 +33,17 @@ }; soc { + adc: adc@40059000 { + compatible = "renesas,rz-adc-c"; + reg = <0x40059000 DT_SIZE_K(1)>; + interrupts = <347 3>; + interrupt-names = "scanend"; + #io-channel-cells = <1>; + vref-mv = <1800>; + channel-available-mask = <0xFF>; + status = "disabled"; + }; + pinctrl: pin-controller@41030000 { compatible = "renesas,rzv-pinctrl"; reg = <0x41030000 DT_SIZE_K(64)>; diff --git a/dts/arm64/renesas/rz/rza/r9a07g063.dtsi b/dts/arm64/renesas/rz/rza/r9a07g063.dtsi index fd75543def8e8..291e4f99c5429 100644 --- a/dts/arm64/renesas/rz/rza/r9a07g063.dtsi +++ b/dts/arm64/renesas/rz/rza/r9a07g063.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { compatible = "renesas,r9a07g063"; @@ -48,6 +49,17 @@ status = "okay"; }; + adc: adc@10059000 { + compatible = "renesas,rz-adc-c"; + reg = <0x10059000 DT_SIZE_K(1)>; + interrupts = ; + interrupt-names = "scanend"; + #io-channel-cells = <1>; + vref-mv = <1800>; + channel-available-mask = <0x3>; + status = "disabled"; + }; + pinctrl: pin-controller@11030000 { compatible = "renesas,rza-pinctrl"; reg = <0x11030000 DT_SIZE_K(64)>; diff --git a/dts/bindings/adc/renesas,rz-adc-c.yaml b/dts/bindings/adc/renesas,rz-adc-c.yaml new file mode 100644 index 0000000000000..175d96b1b8d3a --- /dev/null +++ b/dts/bindings/adc/renesas,rz-adc-c.yaml @@ -0,0 +1,31 @@ +# Copyright (c) 2025 Renesas Electronics Corporation +# SPDX-License-Identifier: Apache-2.0 + +description: "Renesas RZ ADC-C driver" + +compatible: "renesas,rz-adc-c" + +include: [adc-controller.yaml, pinctrl-device.yaml] + +properties: + reg: + required: true + + interrupts: + required: true + + vref-mv: + type: int + required: true + description: Indicates the reference voltage of the ADC in mV. + + channel-available-mask: + type: int + required: true + description: Mask for ADC channels existed in each board + + "#io-channel-cells": + const: 1 + +io-channel-cells: + - input diff --git a/dts/bindings/adc/renesas,rz-adc.yaml b/dts/bindings/adc/renesas,rz-adc.yaml index a76d034716d60..12df1d29a5ab5 100644 --- a/dts/bindings/adc/renesas,rz-adc.yaml +++ b/dts/bindings/adc/renesas,rz-adc.yaml @@ -19,6 +19,11 @@ properties: required: true description: Indicates the reference voltage of the ADC in mV. + unit: + type: int + description: Indicates the unit number of the ADC device. + required: true + channel-available-mask: type: int required: true diff --git a/samples/drivers/adc/adc_dt/boards/rza3ul_smarc.overlay b/samples/drivers/adc/adc_dt/boards/rza3ul_smarc.overlay new file mode 100644 index 0000000000000..07a933707232e --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/rza3ul_smarc.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1>; + }; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/samples/drivers/adc/adc_dt/boards/rzn2l_rsk.overlay b/samples/drivers/adc/adc_dt/boards/rzn2l_rsk.overlay new file mode 100644 index 0000000000000..f88c15d207914 --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/rzn2l_rsk.overlay @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + zephyr,user { + io-channels = <&adc0 0>, <&adc1 3>; + }; +}; + +&adc0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; + +&adc1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@3 { + reg = <3>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/samples/drivers/adc/adc_dt/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay b/samples/drivers/adc/adc_dt/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay new file mode 100644 index 0000000000000..10bfa72db31ef --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + zephyr,user { + io-channels = <&adc0 0>, <&adc1 15>; + }; +}; + +&adc0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; + +&adc1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@15 { + reg = <15>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/samples/drivers/adc/adc_dt/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay b/samples/drivers/adc/adc_dt/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay new file mode 100644 index 0000000000000..517b5820bcc19 --- /dev/null +++ b/samples/drivers/adc/adc_dt/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 2>; + }; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/samples/drivers/adc/adc_sequence/boards/rza3ul_smarc.conf b/samples/drivers/adc/adc_sequence/boards/rza3ul_smarc.conf new file mode 100644 index 0000000000000..65f176fd23b9c --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/rza3ul_smarc.conf @@ -0,0 +1 @@ +CONFIG_SEQUENCE_RESOLUTION=12 diff --git a/samples/drivers/adc/adc_sequence/boards/rza3ul_smarc.overlay b/samples/drivers/adc/adc_sequence/boards/rza3ul_smarc.overlay new file mode 100644 index 0000000000000..43ad590eb5b71 --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/rza3ul_smarc.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + aliases { + adc0 = &adc; + }; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/samples/drivers/adc/adc_sequence/boards/rzn2l_rsk.conf b/samples/drivers/adc/adc_sequence/boards/rzn2l_rsk.conf new file mode 100644 index 0000000000000..65f176fd23b9c --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/rzn2l_rsk.conf @@ -0,0 +1 @@ +CONFIG_SEQUENCE_RESOLUTION=12 diff --git a/samples/drivers/adc/adc_sequence/boards/rzn2l_rsk.overlay b/samples/drivers/adc/adc_sequence/boards/rzn2l_rsk.overlay new file mode 100644 index 0000000000000..45466fccbaca6 --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/rzn2l_rsk.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + aliases { + adc0 = &adc0; + }; +}; + +&adc0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/samples/drivers/adc/adc_sequence/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.conf b/samples/drivers/adc/adc_sequence/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.conf new file mode 100644 index 0000000000000..65f176fd23b9c --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.conf @@ -0,0 +1 @@ +CONFIG_SEQUENCE_RESOLUTION=12 diff --git a/samples/drivers/adc/adc_sequence/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay b/samples/drivers/adc/adc_sequence/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay new file mode 100644 index 0000000000000..45466fccbaca6 --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + aliases { + adc0 = &adc0; + }; +}; + +&adc0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/samples/drivers/adc/adc_sequence/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.conf b/samples/drivers/adc/adc_sequence/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.conf new file mode 100644 index 0000000000000..65f176fd23b9c --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.conf @@ -0,0 +1 @@ +CONFIG_SEQUENCE_RESOLUTION=12 diff --git a/samples/drivers/adc/adc_sequence/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay b/samples/drivers/adc/adc_sequence/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay new file mode 100644 index 0000000000000..cc4128307ed7e --- /dev/null +++ b/samples/drivers/adc/adc_sequence/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + aliases { + adc0 = &adc; + }; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/tests/drivers/adc/adc_api/boards/rza3ul_smarc.overlay b/tests/drivers/adc/adc_api/boards/rza3ul_smarc.overlay new file mode 100644 index 0000000000000..07a933707232e --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/rza3ul_smarc.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 1>; + }; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/tests/drivers/adc/adc_api/boards/rzn2l_rsk.overlay b/tests/drivers/adc/adc_api/boards/rzn2l_rsk.overlay new file mode 100644 index 0000000000000..538e8124da8cd --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/rzn2l_rsk.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + zephyr,user { + io-channels = <&adc0 0>, <&adc0 2>; + }; +}; + +&adc0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/tests/drivers/adc/adc_api/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay b/tests/drivers/adc/adc_api/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay new file mode 100644 index 0000000000000..538e8124da8cd --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/rzt2m_rsk_r9a07g075m24gbg_cr520.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + zephyr,user { + io-channels = <&adc0 0>, <&adc0 2>; + }; +}; + +&adc0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/tests/drivers/adc/adc_api/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay b/tests/drivers/adc/adc_api/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay new file mode 100644 index 0000000000000..517b5820bcc19 --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/rzv2l_smarc_r9a07g054l23gbg_cm33.overlay @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2025 Renesas Electronics Corporation + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +/ { + zephyr,user { + io-channels = <&adc 0>, <&adc 2>; + }; +}; + +&adc { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; + + channel@2 { + reg = <2>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,resolution = <12>; + zephyr,acquisition-time = ; + zephyr,vref-mv = <1800>; + }; +}; diff --git a/west.yml b/west.yml index fe8253bfa2f22..5c455d9af2aa8 100644 --- a/west.yml +++ b/west.yml @@ -226,7 +226,7 @@ manifest: - hal - name: hal_renesas path: modules/hal/renesas - revision: 0769fe1520f6c14e6301188588da758a609f181d + revision: pull/116/head groups: - hal - name: hal_rpi_pico