From aa9b97360d9f80ded7f7af58632659ceb7362f23 Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Mon, 7 Jul 2025 13:24:51 +0200 Subject: [PATCH 01/10] modules: hal_stm32: update the HAL to integrate I2C8 clock configuration Update hal_stm32 to include the modifications allowing to read the I2C8 clock frequency in the same way as I2C1-7. Signed-off-by: Tanguy Raufflet --- west.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/west.yml b/west.yml index e62a20b45b866..9a82f14ae689a 100644 --- a/west.yml +++ b/west.yml @@ -245,7 +245,7 @@ manifest: groups: - hal - name: hal_stm32 - revision: 468e5ad450a75d4baa3eed80e4f77a7700b71203 + revision: pull/293/head path: modules/hal/stm32 groups: - hal From 36d6b49231bb7c9e7eef81050960ed174a0c35c7 Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Thu, 3 Jul 2025 15:07:38 +0200 Subject: [PATCH 02/10] drivers: pinctrl: stm32: add gpioz pinctrl support for STM32MP2 The STM32MP2 series needs gpioz pinctrl support to be able to use the GPIOZ pins. Signed-off-by: Tanguy Raufflet --- drivers/pinctrl/pinctrl_stm32.c | 9 +++++++++ .../zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h | 3 ++- include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h | 4 ++-- 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 946db22bb3b7d..5ac3b1d3ff762 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -66,6 +66,15 @@ static const struct device *const gpio_ports[] = { DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioo)), DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiop)), DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioq)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpior)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpios)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiot)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiou)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiov)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiow)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpiox)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioy)), + DEVICE_DT_GET_OR_NULL(DT_NODELABEL(gpioz)), }; /** Number of GPIO ports. */ diff --git a/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h b/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h index 347304e831b1f..83bf63c7360da 100644 --- a/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h +++ b/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h @@ -27,9 +27,10 @@ #define STM32_PORTO 14 #define STM32_PORTP 15 /* IO port P (0xF) */ #define STM32_PORTQ 16 /* IO port Q (0x10) */ +#define STM32_PORTZ 25 /* IO port Z (0x19) */ #ifndef STM32_PORTS_MAX -#define STM32_PORTS_MAX (STM32_PORTQ + 1) +#define STM32_PORTS_MAX (STM32_PORTZ + 1) #endif /** diff --git a/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h index 8a36d80c0366d..c405038c6931a 100644 --- a/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h +++ b/include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h @@ -55,8 +55,8 @@ * - line [ 5 : 8 ] * - port [ 9 : 13 ] * - * @param port Port ('A'..'Q') - * @param line Pin (0..15) + * @param port Port ('A'..'Q', 'Z') + * @param line Pin (0..25) * @param mode Mode (ANALOG, GPIO_IN, ALTERNATE). */ #define STM32_PINMUX(port, line, mode) \ From aa5fef33dbf3f9067cdf264dd027a3dc3d5ec7e0 Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Thu, 3 Jul 2025 15:15:10 +0200 Subject: [PATCH 03/10] drivers: gpio: stm32: add gpioz support for the STM32MP2 Add support for GPIOZ in the STM32 GPIO driver. Signed-off-by: Tanguy Raufflet --- drivers/gpio/gpio_stm32.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio_stm32.c b/drivers/gpio/gpio_stm32.c index 865f4ae48e0ef..35c93e5468c27 100644 --- a/drivers/gpio/gpio_stm32.c +++ b/drivers/gpio/gpio_stm32.c @@ -789,3 +789,4 @@ GPIO_DEVICE_INIT_STM32_IF_OKAY(n, N); GPIO_DEVICE_INIT_STM32_IF_OKAY(o, O); GPIO_DEVICE_INIT_STM32_IF_OKAY(p, P); GPIO_DEVICE_INIT_STM32_IF_OKAY(q, Q); +GPIO_DEVICE_INIT_STM32_IF_OKAY(z, Z); From ca2f0fff494d39275b71713d5e9de0f5f13df137 Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Thu, 3 Jul 2025 15:25:12 +0200 Subject: [PATCH 04/10] dts: arm: st: stm32mp2_m33.dtsi: add node gpioz Add GPIO Z node to the device tree for STM32MP2 SoC. Signed-off-by: Tanguy Raufflet --- dts/arm/st/mp2/stm32mp2_m33.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/dts/arm/st/mp2/stm32mp2_m33.dtsi b/dts/arm/st/mp2/stm32mp2_m33.dtsi index 262545ef67415..a0e261d8b6555 100644 --- a/dts/arm/st/mp2/stm32mp2_m33.dtsi +++ b/dts/arm/st/mp2/stm32mp2_m33.dtsi @@ -158,6 +158,14 @@ reg = <0x442e0000 DT_SIZE_K(1)>; status = "disabled"; }; + + gpioz: gpio@46200000 { + compatible = "st,stm32mp2-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x46200000 DT_SIZE_K(1)>; + status = "disabled"; + }; }; usart1: serial@40330000 { From a35791d0b5ba1c025c1d6eb88bfdc3fca604f8e3 Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Thu, 19 Jun 2025 10:01:02 +0200 Subject: [PATCH 05/10] dt-bindings: stm32mp2_clock.h: add clock for i2c peripherals Add clock bindings for I2C peripherals for the STM32MP2 series. Signed-off-by: Tanguy Raufflet --- include/zephyr/dt-bindings/clock/stm32mp2_clock.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/include/zephyr/dt-bindings/clock/stm32mp2_clock.h b/include/zephyr/dt-bindings/clock/stm32mp2_clock.h index ba462a0f2874d..507df88c26be4 100644 --- a/include/zephyr/dt-bindings/clock/stm32mp2_clock.h +++ b/include/zephyr/dt-bindings/clock/stm32mp2_clock.h @@ -50,7 +50,17 @@ #define STM32_CLOCK_PERIPH_UART8 0x798 #define STM32_CLOCK_PERIPH_UART9 0x79C +/* I2C Peripheral */ +#define STM32_CLOCK_PERIPH_I2C1 0x7A0 +#define STM32_CLOCK_PERIPH_I2C2 0x7A8 +#define STM32_CLOCK_PERIPH_I2C3 0x7AC +#define STM32_CLOCK_PERIPH_I2C4 0x7B0 +#define STM32_CLOCK_PERIPH_I2C5 0x7B4 +#define STM32_CLOCK_PERIPH_I2C6 0x7B8 +#define STM32_CLOCK_PERIPH_I2C7 0x7BC +#define STM32_CLOCK_PERIPH_I2C8 0x7C0 + #define STM32_CLOCK_PERIPH_MIN STM32_CLOCK_PERIPH_GPIOA -#define STM32_CLOCK_PERIPH_MAX STM32_CLOCK_PERIPH_UART9 +#define STM32_CLOCK_PERIPH_MAX STM32_CLOCK_PERIPH_I2C8 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32MP2_CLOCK_H_ */ From 884c7acbd02e5fdd6c6f6aa54b9fc1776af4e9cd Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Tue, 24 Jun 2025 14:27:39 +0200 Subject: [PATCH 06/10] drivers: clock_stm32_ll_mp2: add i2c clock Add I2C clocks rate reading to the STM32MP2 clock driver. Signed-off-by: Tanguy Raufflet --- drivers/clock_control/clock_stm32_ll_mp2.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/clock_control/clock_stm32_ll_mp2.c b/drivers/clock_control/clock_stm32_ll_mp2.c index 96e4553337753..3bcc933953cc6 100644 --- a/drivers/clock_control/clock_stm32_ll_mp2.c +++ b/drivers/clock_control/clock_stm32_ll_mp2.c @@ -72,6 +72,24 @@ static int stm32_clock_control_get_subsys_rate(const struct device *dev, case STM32_CLOCK_PERIPH_UART9: *rate = LL_RCC_GetUARTClockFreq(LL_RCC_UART9_CLKSOURCE); break; + case STM32_CLOCK_PERIPH_I2C1: + case STM32_CLOCK_PERIPH_I2C2: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C12_I3C12_CLKSOURCE); + break; + case STM32_CLOCK_PERIPH_I2C4: + case STM32_CLOCK_PERIPH_I2C6: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C46_CLKSOURCE); + break; + case STM32_CLOCK_PERIPH_I2C3: + case STM32_CLOCK_PERIPH_I2C5: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C35_I3C3_CLKSOURCE); + break; + case STM32_CLOCK_PERIPH_I2C7: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C7_CLKSOURCE); + break; + case STM32_CLOCK_PERIPH_I2C8: + *rate = LL_RCC_GetI2CClockFreq(LL_RCC_I2C8_CLKSOURCE); + break; default: return -ENOTSUP; } From 18672ba5fcd4f6efb77ad5afcad6675a754af5b1 Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Mon, 23 Jun 2025 09:45:50 +0200 Subject: [PATCH 07/10] drivers: i2c: Kconfig.stm32: enable combined interrupt for STM32MP2 According to the STM32MP2 reference manual, the I2C controller uses a single interrupt line for all events (EV + ERR), so the combined interrupt must be enabled for the STM32MP2 series. Signed-off-by: Tanguy Raufflet --- drivers/i2c/Kconfig.stm32 | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/Kconfig.stm32 b/drivers/i2c/Kconfig.stm32 index 3b7bf71b5517a..42b694bac9a30 100644 --- a/drivers/i2c/Kconfig.stm32 +++ b/drivers/i2c/Kconfig.stm32 @@ -41,7 +41,8 @@ config I2C_STM32_COMBINED_INTERRUPT depends on I2C_STM32_INTERRUPT default y if SOC_SERIES_STM32C0X || SOC_SERIES_STM32F0X || \ SOC_SERIES_STM32G0X || SOC_SERIES_STM32L0X || \ - SOC_SERIES_STM32U0X || SOC_SERIES_STM32WB0X + SOC_SERIES_STM32U0X || SOC_SERIES_STM32WB0X || \ + SOC_SERIES_STM32MP2X config I2C_STM32_BUS_RECOVERY bool "Bus recovery support" From 0774d45090f64136cd93cc66f9f619cac7a41df8 Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Thu, 19 Jun 2025 10:02:31 +0200 Subject: [PATCH 08/10] dts: arm: st: stm32mp2_m33.dtsi: add i2c nodes Add I2C nodes in non-secure context to dtsi. Signed-off-by: Tanguy Raufflet --- dts/arm/st/mp2/stm32mp2_m33.dtsi | 97 ++++++++++++++++++++++++++++++++ 1 file changed, 97 insertions(+) diff --git a/dts/arm/st/mp2/stm32mp2_m33.dtsi b/dts/arm/st/mp2/stm32mp2_m33.dtsi index a0e261d8b6555..7a269838c4268 100644 --- a/dts/arm/st/mp2/stm32mp2_m33.dtsi +++ b/dts/arm/st/mp2/stm32mp2_m33.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { cpus { @@ -248,6 +249,102 @@ interrupts = <150 0>; status = "disabled"; }; + + i2c1: i2c@40120000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40120000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C1, STM32_CLK)>; + clock-frequency = ; + interrupts = <108 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c2: i2c@40130000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40130000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C2, STM32_CLK)>; + clock-frequency = ; + interrupts = <110 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c3: i2c@40140000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40140000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C3, STM32_CLK)>; + clock-frequency = ; + interrupts = <137 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c4: i2c@40150000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40150000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C4, STM32_CLK)>; + clock-frequency = ; + interrupts = <168 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c5: i2c@40160000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40160000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C5, STM32_CLK)>; + clock-frequency = ; + interrupts = <181 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c6: i2c@40170000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40170000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C6, STM32_CLK)>; + clock-frequency = ; + interrupts = <208 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c7: i2c@40180000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x40180000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C7, STM32_CLK)>; + clock-frequency = ; + interrupts = <210 0>; + interrupt-names = "combined"; + status = "disabled"; + }; + + i2c8: i2c@46040000 { + compatible = "st,stm32-i2c-v2"; + reg = <0x46040000 DT_SIZE_K(1)>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&rcc STM32_CLOCK(I2C8, STM32_CLK)>; + clock-frequency = ; + interrupts = <212 0>; + interrupt-names = "combined"; + status = "disabled"; + }; }; }; From 432fb4706f9adba830f0d0eb6ddc62110e157fcf Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Thu, 19 Jun 2025 10:03:29 +0200 Subject: [PATCH 09/10] boards: st: stm32mp257f_ev1_stm32mp257fxx_m33.yaml: update documentation The I2C is now supported. Signed-off-by: Tanguy Raufflet --- boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml b/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml index 3f8f8068cd331..fda9a4e57c222 100644 --- a/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml +++ b/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.yaml @@ -9,6 +9,7 @@ supported: - LED - gpio - shell + - i2c testing: ignore_tags: - cmsis_rtos_v2 From f038a95b59e192a5327dab113750fa85e9a2ea18 Mon Sep 17 00:00:00 2001 From: Tanguy Raufflet Date: Wed, 25 Jun 2025 13:15:14 +0200 Subject: [PATCH 10/10] stm32mp257f_ev1_stm32mp257fxx_m33.dts: add i2c node This commit adds the i2c8 node to the device tree for the STM32MP257F-EV1 board. This node corresponds to the i2c exposed by the GPIO expansion connector [1] and not used by the cortex A35. [1]: https://wiki.st.com/stm32mpu/wiki/STM32MP257x-EV1_-_hardware_description Signed-off-by: Tanguy Raufflet --- .../stm32mp257f_ev1_stm32mp257fxx_m33.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts b/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts index c9a3cdd4f79da..8196ea3546a49 100644 --- a/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts +++ b/boards/st/stm32mp257f_ev1/stm32mp257f_ev1_stm32mp257fxx_m33.dts @@ -57,6 +57,10 @@ status = "okay"; }; +&gpioz { + status = "okay"; +}; + &uart5 { pinctrl-0 = <&uart5_tx_pg9 &uart5_rx_pg10>; pinctrl-names = "default"; @@ -70,3 +74,9 @@ current-speed = <115200>; status = "disabled"; }; + +&i2c8 { + pinctrl-0 = <&i2c8_scl_pz4 &i2c8_sda_pz3>; + pinctrl-names = "default"; + status = "okay"; +};